| Message ID | 20240320090214.40465-6-ada@thorsis.com |
|---|---|
| State | Accepted |
| Commit | 8f9a445c15d173a5aa50d4e4399453de53e9c89e |
| Delegated to: | Dario Binacchi |
| Headers | show |
| Series | mtd: nand: raw: Collected improvements | expand |
On Wed, Mar 20, 2024 at 10:02 AM Alexander Dahl <ada@thorsis.com> wrote: > > Introduced with commit 6a8dfd57220d ("nand: atmel: Add DM based NAND > driver") when driver was initially ported from Linux. The context > around this and especially the code itself suggests 'read' is meant > instead of write. > > The fix is the same as accepted in Linux already with mainline Linux > kernel commit 1c60e027ffde ("mtd: nand: raw: atmel: Fix comment in > timings preparation"). > > Link: https://lore.kernel.org/linux-mtd/20240307172835.3453880-1-miquel.raynal@bootlin.com/T/#t > Signed-off-by: Alexander Dahl <ada@thorsis.com> > --- > > Notes: > v2: > - initial patch version (not present in v1) > > drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c > index 75da15c157b..bbafc88e44c 100644 > --- a/drivers/mtd/nand/raw/atmel/nand-controller.c > +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c > @@ -1271,7 +1271,7 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand, > return ret; > > /* > - * The write cycle timing is directly matching tWC, but is also > + * The read cycle timing is directly matching tRC, but is also > * dependent on the setup and hold timings we calculated earlier, > * which gives: > * > -- Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> > 2.39.2 >
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c index 75da15c157b..bbafc88e44c 100644 --- a/drivers/mtd/nand/raw/atmel/nand-controller.c +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c @@ -1271,7 +1271,7 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand, return ret; /* - * The write cycle timing is directly matching tWC, but is also + * The read cycle timing is directly matching tRC, but is also * dependent on the setup and hold timings we calculated earlier, * which gives: *
Introduced with commit 6a8dfd57220d ("nand: atmel: Add DM based NAND driver") when driver was initially ported from Linux. The context around this and especially the code itself suggests 'read' is meant instead of write. The fix is the same as accepted in Linux already with mainline Linux kernel commit 1c60e027ffde ("mtd: nand: raw: atmel: Fix comment in timings preparation"). Link: https://lore.kernel.org/linux-mtd/20240307172835.3453880-1-miquel.raynal@bootlin.com/T/#t Signed-off-by: Alexander Dahl <ada@thorsis.com> --- Notes: v2: - initial patch version (not present in v1) drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)