| Message ID | 20230212231638.1134219-69-sjg@chromium.org |
|---|---|
| State | RFC |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | RFC: Migrate to split config | expand |
On Sun, Feb 12, 2023 at 04:16:11PM -0700, Simon Glass wrote: > Update this to use the PPL condition instead, so that nothing changes when > building for SPL with split config. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > (no changes since v1) > > arch/arm/mach-socfpga/misc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c > index 5b5a81a255d..b09b898051b 100644 > --- a/arch/arm/mach-socfpga/misc.c > +++ b/arch/arm/mach-socfpga/misc.c > @@ -32,7 +32,7 @@ phys_addr_t socfpga_clkmgr_base __section(".data"); > phys_addr_t socfpga_rstmgr_base __section(".data"); > phys_addr_t socfpga_sysmgr_base __section(".data"); > > -#ifdef CONFIG_SYS_L2_PL310 > +#ifdef CONFIG_PPL_SYS_L2_PL310 > static const struct pl310_regs *const pl310 = > (struct pl310_regs *)CFG_SYS_PL310_BASE; > #endif > @@ -66,7 +66,7 @@ void enable_caches(void) > #endif > } > > -#ifdef CONFIG_SYS_L2_PL310 > +#ifdef CONFIG_PPL_SYS_L2_PL310 > void v7_outer_cache_enable(void) > { > struct udevice *dev; Why can we not continue to use CONFIG_SYS_L2_PL310 in this case?
Hi Tom, On Tue, 14 Feb 2023 at 09:38, Tom Rini <trini@konsulko.com> wrote: > > On Sun, Feb 12, 2023 at 04:16:11PM -0700, Simon Glass wrote: > > > Update this to use the PPL condition instead, so that nothing changes when > > building for SPL with split config. > > > > Signed-off-by: Simon Glass <sjg@chromium.org> > > --- > > > > (no changes since v1) > > > > arch/arm/mach-socfpga/misc.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c > > index 5b5a81a255d..b09b898051b 100644 > > --- a/arch/arm/mach-socfpga/misc.c > > +++ b/arch/arm/mach-socfpga/misc.c > > @@ -32,7 +32,7 @@ phys_addr_t socfpga_clkmgr_base __section(".data"); > > phys_addr_t socfpga_rstmgr_base __section(".data"); > > phys_addr_t socfpga_sysmgr_base __section(".data"); > > > > -#ifdef CONFIG_SYS_L2_PL310 > > +#ifdef CONFIG_PPL_SYS_L2_PL310 > > static const struct pl310_regs *const pl310 = > > (struct pl310_regs *)CFG_SYS_PL310_BASE; > > #endif > > @@ -66,7 +66,7 @@ void enable_caches(void) > > #endif > > } > > > > -#ifdef CONFIG_SYS_L2_PL310 > > +#ifdef CONFIG_PPL_SYS_L2_PL310 > > void v7_outer_cache_enable(void) > > { > > struct udevice *dev; > > Why can we not continue to use CONFIG_SYS_L2_PL310 in this case? This is because the code is compiled for SPL too, iwc that option is not enabled with split config. For now I'll move it to the mythical 'splg' series (that actually does split config) Regards, Simon
On Wed, Feb 22, 2023 at 12:16:53PM -0700, Simon Glass wrote: > Hi Tom, > > On Tue, 14 Feb 2023 at 09:38, Tom Rini <trini@konsulko.com> wrote: > > > > On Sun, Feb 12, 2023 at 04:16:11PM -0700, Simon Glass wrote: > > > > > Update this to use the PPL condition instead, so that nothing changes when > > > building for SPL with split config. > > > > > > Signed-off-by: Simon Glass <sjg@chromium.org> > > > --- > > > > > > (no changes since v1) > > > > > > arch/arm/mach-socfpga/misc.c | 4 ++-- > > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > > > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c > > > index 5b5a81a255d..b09b898051b 100644 > > > --- a/arch/arm/mach-socfpga/misc.c > > > +++ b/arch/arm/mach-socfpga/misc.c > > > @@ -32,7 +32,7 @@ phys_addr_t socfpga_clkmgr_base __section(".data"); > > > phys_addr_t socfpga_rstmgr_base __section(".data"); > > > phys_addr_t socfpga_sysmgr_base __section(".data"); > > > > > > -#ifdef CONFIG_SYS_L2_PL310 > > > +#ifdef CONFIG_PPL_SYS_L2_PL310 > > > static const struct pl310_regs *const pl310 = > > > (struct pl310_regs *)CFG_SYS_PL310_BASE; > > > #endif > > > @@ -66,7 +66,7 @@ void enable_caches(void) > > > #endif > > > } > > > > > > -#ifdef CONFIG_SYS_L2_PL310 > > > +#ifdef CONFIG_PPL_SYS_L2_PL310 > > > void v7_outer_cache_enable(void) > > > { > > > struct udevice *dev; > > > > Why can we not continue to use CONFIG_SYS_L2_PL310 in this case? > > This is because the code is compiled for SPL too, iwc that option is > not enabled with split config. > > For now I'll move it to the mythical 'splg' series (that actually does > split config) That this is discarded normally, today, as seems intentional: $ make socfpga_socrates_defconfig # # configuration written to .config # $ grep PL310 .config CONFIG_SYS_L2_PL310=y # CONFIG_SPL_SYS_L2_PL310 is not set $ But needs changes like this with split config is worrisome.
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 5b5a81a255d..b09b898051b 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -32,7 +32,7 @@ phys_addr_t socfpga_clkmgr_base __section(".data"); phys_addr_t socfpga_rstmgr_base __section(".data"); phys_addr_t socfpga_sysmgr_base __section(".data"); -#ifdef CONFIG_SYS_L2_PL310 +#ifdef CONFIG_PPL_SYS_L2_PL310 static const struct pl310_regs *const pl310 = (struct pl310_regs *)CFG_SYS_PL310_BASE; #endif @@ -66,7 +66,7 @@ void enable_caches(void) #endif } -#ifdef CONFIG_SYS_L2_PL310 +#ifdef CONFIG_PPL_SYS_L2_PL310 void v7_outer_cache_enable(void) { struct udevice *dev;
Update this to use the PPL condition instead, so that nothing changes when building for SPL with split config. Signed-off-by: Simon Glass <sjg@chromium.org> --- (no changes since v1) arch/arm/mach-socfpga/misc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)