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[2/2] arch: arm: mach-socfpga: HSD #1508115548-2: Ensure bitstream address location not exceed 512MB

Message ID 20220911150627.32341-2-jit.loon.lim@intel.com
State Needs Review / ACK, archived
Delegated to: Marek Vasut
Headers show
Series [1/2] arch: arm: mach-socfpga: HSD #1508115548-1: Add SMMU status and Stream ID checking functions | expand

Commit Message

Jit Loon Lim Sept. 11, 2022, 3:06 p.m. UTC 
From: Chee Hong Ang <chee.hong.ang@intel.com>

Secure Device Manager(SDM) has only 512MB window address space to HPS
over PSI BE link. The default access range is 0x0 to 0x1FFFFFFF.
To allow SDM accessing the address space more than 512MB, SMMU has to be
setup for address translation.

U-Boot will not allow the fpga reconfiguration with any bitstream data
address exceed 512MB to proceed if PSI BE link address translation is not
setup in SMMU.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
 arch/arm/mach-socfpga/include/mach/smmu_s10.h |  6 ++++++
 drivers/fpga/intel_sdm_mb.c                   | 13 +++++++++++++
 2 files changed, 19 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/mach-socfpga/include/mach/smmu_s10.h b/arch/arm/mach-socfpga/include/mach/smmu_s10.h
index dfcc99f82a..61157c03d6 100644
--- a/arch/arm/mach-socfpga/include/mach/smmu_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/smmu_s10.h
@@ -30,6 +30,12 @@ 
 
 #define SMMU_SID_SDM2HPS_PSI_BE		0
 
+#define SDM2HPS_PSI_BE_ADDR_BASE	0
+/* PSI BE 512MB address window */
+#define SDM2HPS_PSI_BE_WINDOW_SZ	0x20000000
+#define SDM2HPS_PSI_BE_ADDR_END		\
+	(SDM2HPS_PSI_BE_ADDR_BASE + SDM2HPS_PSI_BE_WINDOW_SZ - 1)
+
 void socfpga_init_smmu(void);
 int is_smmu_bypass(void);
 int is_smmu_stream_id_enabled(u32 stream_id);
diff --git a/drivers/fpga/intel_sdm_mb.c b/drivers/fpga/intel_sdm_mb.c
index f5fd9a14c2..a2191c1a16 100644
--- a/drivers/fpga/intel_sdm_mb.c
+++ b/drivers/fpga/intel_sdm_mb.c
@@ -9,6 +9,7 @@ 
 #include <watchdog.h>
 #include <asm/arch/mailbox_s10.h>
 #include <asm/arch/smc_api.h>
+#include <asm/arch/smmu_s10.h>
 #include <linux/delay.h>
 #include <linux/intel-smc.h>
 
@@ -394,6 +395,18 @@  int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
 	u32 resp_len = 2;
 	u32 resp_buf[2];
 
+	/*
+	 * Don't start the FPGA reconfiguration if bitstream location exceed the
+	 * PSI BE 512MB address window and SMMU is not setup for PSI BE address
+	 * translation.
+	 */
+	if (((u64)rbf_data + rbf_size) >= SDM2HPS_PSI_BE_ADDR_END &&
+	    !is_smmu_stream_id_enabled(SMMU_SID_SDM2HPS_PSI_BE)) {
+		printf("Failed: Bitstream location must not exceed 0x%08x\n",
+		       SDM2HPS_PSI_BE_ADDR_END);
+		return -EINVAL;
+	}
+
 	debug("Sending MBOX_RECONFIG...\n");
 	ret = mbox_send_cmd(MBOX_ID_UBOOT, MBOX_RECONFIG, MBOX_CMD_DIRECT, 0,
 			    NULL, 0, &resp_len, resp_buf);