From patchwork Sun Sep 11 15:06:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jit Loon Lim X-Patchwork-Id: 1676534 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=FN4eVeP+; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MQY3n0xtxz1ypG for ; Mon, 12 Sep 2022 01:06:59 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C6CC384B7A; Sun, 11 Sep 2022 17:06:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="FN4eVeP+"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7F1B184A86; Sun, 11 Sep 2022 17:06:42 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4F9B184A03 for ; Sun, 11 Sep 2022 17:06:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662908797; x=1694444797; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eK4/fZ8QbCwlGtJlGyv62r0jBI7JjohRtr3ZLtfhwkg=; b=FN4eVeP+hdAmjUwUjN/FyJLILbetbgaSLDwAXSrBIXtC+RD8RN/YEXJu iqunQ9ztiKyDh93ttyTcyeW7ORi30rWp5QYeDcmAJkKPqB+GcsdM2DgAU KJJJar2ipcobp1rgEMkfJrlJ9Tvywm9uGfcY1tx0nM3OeIO9AstPpH5U5 xR1g+JVyKiVdohFKJVBTVtowuVeqd/qkny4TfgwyUB0NO/Fpeqv6XSfWT A+Y+1Mi2yt2DHV2/sk0jUJN1QRs6w3FLOudasNq54g3sbkvUU0pO9vGCZ NwTsMGuQmuaZwbP1pWic5744JKJN8Foo8Gobs42LVP0BuPmyZkH0ZIuMZ Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10467"; a="295313046" X-IronPort-AV: E=Sophos;i="5.93,307,1654585200"; d="scan'208";a="295313046" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2022 08:06:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,307,1654585200"; d="scan'208";a="566908948" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga003.jf.intel.com with ESMTP; 11 Sep 2022 08:06:30 -0700 Received: from localhost (pgli0028.png.intel.com [10.221.84.177]) by pglmail07.png.intel.com (Postfix) with ESMTP id CEE7D32F1; Sun, 11 Sep 2022 23:06:29 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id CCB42E00414; Sun, 11 Sep 2022 23:06:29 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang , Chee Hong Ang Subject: [PATCH 2/2] arch: arm: mach-socfpga: HSD #1508115548-2: Ensure bitstream address location not exceed 512MB Date: Sun, 11 Sep 2022 23:06:27 +0800 Message-Id: <20220911150627.32341-2-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220911150627.32341-1-jit.loon.lim@intel.com> References: <20220911150627.32341-1-jit.loon.lim@intel.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Chee Hong Ang Secure Device Manager(SDM) has only 512MB window address space to HPS over PSI BE link. The default access range is 0x0 to 0x1FFFFFFF. To allow SDM accessing the address space more than 512MB, SMMU has to be setup for address translation. U-Boot will not allow the fpga reconfiguration with any bitstream data address exceed 512MB to proceed if PSI BE link address translation is not setup in SMMU. Signed-off-by: Chee Hong Ang Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/include/mach/smmu_s10.h | 6 ++++++ drivers/fpga/intel_sdm_mb.c | 13 +++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/mach-socfpga/include/mach/smmu_s10.h b/arch/arm/mach-socfpga/include/mach/smmu_s10.h index dfcc99f82a..61157c03d6 100644 --- a/arch/arm/mach-socfpga/include/mach/smmu_s10.h +++ b/arch/arm/mach-socfpga/include/mach/smmu_s10.h @@ -30,6 +30,12 @@ #define SMMU_SID_SDM2HPS_PSI_BE 0 +#define SDM2HPS_PSI_BE_ADDR_BASE 0 +/* PSI BE 512MB address window */ +#define SDM2HPS_PSI_BE_WINDOW_SZ 0x20000000 +#define SDM2HPS_PSI_BE_ADDR_END \ + (SDM2HPS_PSI_BE_ADDR_BASE + SDM2HPS_PSI_BE_WINDOW_SZ - 1) + void socfpga_init_smmu(void); int is_smmu_bypass(void); int is_smmu_stream_id_enabled(u32 stream_id); diff --git a/drivers/fpga/intel_sdm_mb.c b/drivers/fpga/intel_sdm_mb.c index f5fd9a14c2..a2191c1a16 100644 --- a/drivers/fpga/intel_sdm_mb.c +++ b/drivers/fpga/intel_sdm_mb.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -394,6 +395,18 @@ int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) u32 resp_len = 2; u32 resp_buf[2]; + /* + * Don't start the FPGA reconfiguration if bitstream location exceed the + * PSI BE 512MB address window and SMMU is not setup for PSI BE address + * translation. + */ + if (((u64)rbf_data + rbf_size) >= SDM2HPS_PSI_BE_ADDR_END && + !is_smmu_stream_id_enabled(SMMU_SID_SDM2HPS_PSI_BE)) { + printf("Failed: Bitstream location must not exceed 0x%08x\n", + SDM2HPS_PSI_BE_ADDR_END); + return -EINVAL; + } + debug("Sending MBOX_RECONFIG...\n"); ret = mbox_send_cmd(MBOX_ID_UBOOT, MBOX_RECONFIG, MBOX_CMD_DIRECT, 0, NULL, 0, &resp_len, resp_buf);