| Message ID | 20220524055650.1115899-13-chin-ting_kuo@aspeedtech.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | Add ASPEED SPI controller driver | expand |
On 5/24/22 07:56, Chin-Ting Kuo wrote: > When SPI_NOR_4B_OPCODES flag is set for a specific flash > in spi_nor_ids[] table, EN4B command will not be issued and > 4-byte dedicated commands will be used to access SPI flash. > Thus, instead of EN4B command, address length is more suitable > for deciding whether the controller should be set to 4-byte mode. > > Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> > --- > drivers/spi/spi-aspeed.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/spi/spi-aspeed.c b/drivers/spi/spi-aspeed.c > index e5e348eb7b..687ddc370b 100644 > --- a/drivers/spi/spi-aspeed.c > +++ b/drivers/spi/spi-aspeed.c > @@ -504,10 +504,6 @@ static int aspeed_spi_exec_op_user_mode(struct spi_slave *slave, > /* Restore controller setting. */ > writel(flash->ce_ctrl_read, ctrl_reg); > > - /* Set controller to 4-byte mode when flash is in 4-byte mode. */ > - if (op->cmd.opcode == SPINOR_OP_EN4B) > - priv->info->set_4byte(bus, cs); > - > return 0; > } This should be part of the patch adding the driver. Thanks, C. > @@ -561,6 +557,9 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) > plat->ctrl_base + REG_CE0_CTRL_REG + cs * 4); > priv->flashes[cs].ce_ctrl_read = reg_val; > > + if (op_tmpl.addr.nbytes == 4) > + priv->info->set_4byte(bus, cs); > + > dev_dbg(dev, "read bus width: %d [0x%08x]\n", > op_tmpl.data.buswidth, priv->flashes[cs].ce_ctrl_read); > } else {
Hi Cédric, > -----Original Message----- > From: Cédric Le Goater <clg@kaod.org> > Sent: Friday, July 1, 2022 5:45 PM > Subject: Re: [v4 12/12] spi: aspeed: Fix bug when SPI_NOR_4B_OPCODES flag > is set > > On 5/24/22 07:56, Chin-Ting Kuo wrote: > > When SPI_NOR_4B_OPCODES flag is set for a specific flash in > > spi_nor_ids[] table, EN4B command will not be issued and 4-byte > > dedicated commands will be used to access SPI flash. > > Thus, instead of EN4B command, address length is more suitable for > > deciding whether the controller should be set to 4-byte mode. > > > > Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> > > --- > > drivers/spi/spi-aspeed.c | 7 +++---- > > 1 file changed, 3 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/spi/spi-aspeed.c b/drivers/spi/spi-aspeed.c index > > e5e348eb7b..687ddc370b 100644 > > --- a/drivers/spi/spi-aspeed.c > > +++ b/drivers/spi/spi-aspeed.c > > @@ -504,10 +504,6 @@ static int aspeed_spi_exec_op_user_mode(struct > spi_slave *slave, > > /* Restore controller setting. */ > > writel(flash->ce_ctrl_read, ctrl_reg); > > > > - /* Set controller to 4-byte mode when flash is in 4-byte mode. */ > > - if (op->cmd.opcode == SPINOR_OP_EN4B) > > - priv->info->set_4byte(bus, cs); > > - > > return 0; > > } > > > This should be part of the patch adding the driver. > Okay. Thanks. Chin-Ting > Thanks, > > C. > > > > @@ -561,6 +557,9 @@ static int aspeed_spi_dirmap_create(struct > spi_mem_dirmap_desc *desc) > > plat->ctrl_base + REG_CE0_CTRL_REG + cs * 4); > > priv->flashes[cs].ce_ctrl_read = reg_val; > > > > + if (op_tmpl.addr.nbytes == 4) > > + priv->info->set_4byte(bus, cs); > > + > > dev_dbg(dev, "read bus width: %d [0x%08x]\n", > > op_tmpl.data.buswidth, priv->flashes[cs].ce_ctrl_read); > > } else {
diff --git a/drivers/spi/spi-aspeed.c b/drivers/spi/spi-aspeed.c index e5e348eb7b..687ddc370b 100644 --- a/drivers/spi/spi-aspeed.c +++ b/drivers/spi/spi-aspeed.c @@ -504,10 +504,6 @@ static int aspeed_spi_exec_op_user_mode(struct spi_slave *slave, /* Restore controller setting. */ writel(flash->ce_ctrl_read, ctrl_reg); - /* Set controller to 4-byte mode when flash is in 4-byte mode. */ - if (op->cmd.opcode == SPINOR_OP_EN4B) - priv->info->set_4byte(bus, cs); - return 0; } @@ -561,6 +557,9 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) plat->ctrl_base + REG_CE0_CTRL_REG + cs * 4); priv->flashes[cs].ce_ctrl_read = reg_val; + if (op_tmpl.addr.nbytes == 4) + priv->info->set_4byte(bus, cs); + dev_dbg(dev, "read bus width: %d [0x%08x]\n", op_tmpl.data.buswidth, priv->flashes[cs].ce_ctrl_read); } else {
When SPI_NOR_4B_OPCODES flag is set for a specific flash in spi_nor_ids[] table, EN4B command will not be issued and 4-byte dedicated commands will be used to access SPI flash. Thus, instead of EN4B command, address length is more suitable for deciding whether the controller should be set to 4-byte mode. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> --- drivers/spi/spi-aspeed.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)