diff mbox series

[3/3] arm: dts: Add DTS description for MMC2 am33xx devices

Message ID 20220218122844.2493-3-lukma@denx.de
State Accepted
Commit 4a9099ef1c77c4a166509a811d15694309bd4c17
Delegated to: Tom Rini
Headers show
Series [1/3] arm: mmc: Add "ti, am335-sdhci" compatible for TI's omap_hsmmc driver | expand

Commit Message

Lukasz Majewski Feb. 18, 2022, 12:28 p.m. UTC 
This code has been ported from Linux v5.16.9 arch/arm/boot/dts/am33xx.dtsi
file to allow correct usage of MMC2 controller in U-Boot.

This IP block is a bit specific as it is connected to L3 interconnect bus,
whereas mmc[01] are connected to L4.

Proper configuration of this block (including providing clock) is handled
in ti-sysc.c driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

 arch/arm/dts/am33xx.dtsi | 39 ++++++++++++++++++++++++++++++---------
 1 file changed, 30 insertions(+), 9 deletions(-)

Comments

Tom Rini March 7, 2022, 9:23 p.m. UTC | #1 
On Fri, Feb 18, 2022 at 01:28:43PM +0100, Lukasz Majewski wrote:

> This code has been ported from Linux v5.16.9 arch/arm/boot/dts/am33xx.dtsi
> file to allow correct usage of MMC2 controller in U-Boot.
> 
> This IP block is a bit specific as it is connected to L3 interconnect bus,
> whereas mmc[01] are connected to L4.
> 
> Proper configuration of this block (including providing clock) is handled
> in ti-sysc.c driver.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Applied to u-boot/next, thanks!
diff mbox series

Patch

diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index 5f9b306ddb..5871344edb 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -42,6 +42,7 @@ 
 		spi1 = &spi1;
 		mmc0 = &mmc1;
 		mmc1 = &mmc2;
+		mmc2 = &mmc3;
 	};
 
 	cpus {
@@ -303,6 +304,35 @@ 
 			};
 		};
 
+		target-module@47810000 {
+			compatible = "ti,sysc-omap2", "ti,sysc";
+			reg = <0x478102fc 0x4>,
+			      <0x47810110 0x4>,
+			      <0x47810114 0x4>;
+			reg-names = "rev", "sysc", "syss";
+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+					 SYSC_OMAP2_ENAWAKEUP |
+					 SYSC_OMAP2_SOFTRESET |
+					 SYSC_OMAP2_AUTOIDLE)>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,syss-mask = <1>;
+			clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x47810000 0x1000>;
+
+			mmc3: mmc@0 {
+			      compatible = "ti,am335-sdhci";
+			      ti,needs-special-reset;
+			      interrupts = <29>;
+			      reg = <0x0 0x1000>;
+			      status = "disabled";
+			};
+		};
+
 		i2c0: i2c@44e0b000 {
 			compatible = "ti,omap4-i2c";
 			#address-cells = <1>;
@@ -359,15 +389,6 @@ 
 			status = "disabled";
 		};
 
-		mmc3: mmc@47810000 {
-			compatible = "ti,omap4-hsmmc";
-			ti,hwmods = "mmc3";
-			ti,needs-special-reset;
-			interrupts = <29>;
-			reg = <0x47810000 0x1000>;
-			status = "disabled";
-		};
-
 		wdt2: wdt@44e35000 {
 			compatible = "ti,omap3-wdt";
 			ti,hwmods = "wd_timer2";