| Message ID | 20210513084618.2161331-2-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Commit | 89419279f4fe6bfd68dd518059ef2007295f1cb4 |
| Delegated to: | Andes |
| Headers | show |
| Series | [1/2] riscv: Fix memmove and optimise memcpy when misalign | expand |
On Thu, May 13, 2021 at 04:46:18PM +0800, Bin Meng wrote: > Currently all assembly optimized implementation of memory routines > show up at the top level of the RISC-V architecture Kconfig menu. > Let's group them together into a submenu. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >--- Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 82e10da11e..63665d210c 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -278,6 +278,8 @@ config STACK_SIZE_SHIFT config OF_BOARD_FIXUP default y if OF_SEPARATE && RISCV_SMODE +menu "Use assembly optimized implementation of memory routines" + config USE_ARCH_MEMCPY bool "Use an assembly optimized implementation of memcpy" default y @@ -357,3 +359,5 @@ config TPL_USE_ARCH_MEMSET but may increase the binary size. endmenu + +endmenu
Currently all assembly optimized implementation of memory routines show up at the top level of the RISC-V architecture Kconfig menu. Let's group them together into a submenu. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- arch/riscv/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)