diff mbox series

[01/12] i2c: designware_i2c: Add more registers

Message ID 20191221161525.27976-2-sjg@chromium.org
State Superseded
Delegated to: Heiko Schocher
Headers show
Series i2c: designware_ic2: Improvements to timing | expand

Commit Message

Simon Glass Dec. 21, 2019, 4:15 p.m. UTC
Some versions of this peripherals previde more control of the bus
behaviour. Add definitions for these registers.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/i2c/designware_i2c.h | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

Comments

Ley Foon Tan Dec. 23, 2019, 8:15 a.m. UTC | #1
> -----Original Message-----
> From: Simon Glass <sjg@chromium.org>
> Sent: Sunday, December 22, 2019 12:15 AM
> To: U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Jun Chen <ptchentw@gmail.com>; Heiko Schocher <hs@denx.de>; Tan,
> Ley Foon <ley.foon.tan@intel.com>; Simon Glass <sjg@chromium.org>
> Subject: [PATCH 01/12] i2c: designware_i2c: Add more registers
> 
> Some versions of this peripherals previde more control of the bus behaviour.
> Add definitions for these registers.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
Typo for 'previde' in commit message.

Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>

> ---
> 
>  drivers/i2c/designware_i2c.h | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
> index 48766d0806..d359c8c3f8 100644
> --- a/drivers/i2c/designware_i2c.h
> +++ b/drivers/i2c/designware_i2c.h
> @@ -43,8 +43,19 @@ struct i2c_regs {
>  	u32 ic_rxflr;		/* 0x78 */
>  	u32 ic_sda_hold;	/* 0x7c */
>  	u32 ic_tx_abrt_source;	/* 0x80 */
> -	u8 res1[0x18];		/* 0x84 */
> +	u32 slv_data_nak_only;
> +	u32 dma_cr;
> +	u32 dma_tdlr;
> +	u32 dma_rdlr;
> +	u32 sda_setup;
> +	u32 ack_general_call;
>  	u32 ic_enable_status;	/* 0x9c */
> +	u32 fs_spklen;
> +	u32 hs_spklen;
> +	u32 clr_restart_det;
> +	u32 comp_param1;
> +	u32 comp_version;
> +	u32 comp_type;
>  };
> 
>  #if !defined(IC_CLK)
> --
> 2.24.1.735.g03f4e72817-goog
Jun Chen Dec. 25, 2019, 10:20 a.m. UTC | #2
>
> > -----Original Message-----
> > From: Simon Glass <sjg@chromium.org>
> > Sent: Sunday, December 22, 2019 12:15 AM
> > To: U-Boot Mailing List <u-boot@lists.denx.de>
> > Cc: Jun Chen <ptchentw@gmail.com>; Heiko Schocher <hs@denx.de>; Tan,
> > Ley Foon <ley.foon.tan@intel.com>; Simon Glass <sjg@chromium.org>
> > Subject: [PATCH 01/12] i2c: designware_i2c: Add more registers
> >
> > Some versions of this peripherals previde more control of the bus
> behaviour.
> > Add definitions for these registers.
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> Typo for 'previde' in commit message.
>
> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
>

Reviewed-by: Jun Chen <ptchentw@gmail.com>

>
> > ---
> >
> >  drivers/i2c/designware_i2c.h | 13 ++++++++++++-
> >  1 file changed, 12 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
> > index 48766d0806..d359c8c3f8 100644
> > --- a/drivers/i2c/designware_i2c.h
> > +++ b/drivers/i2c/designware_i2c.h
> > @@ -43,8 +43,19 @@ struct i2c_regs {
> >       u32 ic_rxflr;           /* 0x78 */
> >       u32 ic_sda_hold;        /* 0x7c */
> >       u32 ic_tx_abrt_source;  /* 0x80 */
> > -     u8 res1[0x18];          /* 0x84 */
> > +     u32 slv_data_nak_only;
> > +     u32 dma_cr;
> > +     u32 dma_tdlr;
> > +     u32 dma_rdlr;
> > +     u32 sda_setup;
> > +     u32 ack_general_call;
> >       u32 ic_enable_status;   /* 0x9c */
> > +     u32 fs_spklen;
> > +     u32 hs_spklen;
> > +     u32 clr_restart_det;
> > +     u32 comp_param1;
> > +     u32 comp_version;
> > +     u32 comp_type;
> >  };
> >
> >  #if !defined(IC_CLK)
> > --
> > 2.24.1.735.g03f4e72817-goog
>
>
diff mbox series

Patch

diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
index 48766d0806..d359c8c3f8 100644
--- a/drivers/i2c/designware_i2c.h
+++ b/drivers/i2c/designware_i2c.h
@@ -43,8 +43,19 @@  struct i2c_regs {
 	u32 ic_rxflr;		/* 0x78 */
 	u32 ic_sda_hold;	/* 0x7c */
 	u32 ic_tx_abrt_source;	/* 0x80 */
-	u8 res1[0x18];		/* 0x84 */
+	u32 slv_data_nak_only;
+	u32 dma_cr;
+	u32 dma_tdlr;
+	u32 dma_rdlr;
+	u32 sda_setup;
+	u32 ack_general_call;
 	u32 ic_enable_status;	/* 0x9c */
+	u32 fs_spklen;
+	u32 hs_spklen;
+	u32 clr_restart_det;
+	u32 comp_param1;
+	u32 comp_version;
+	u32 comp_type;
 };
 
 #if !defined(IC_CLK)