| Message ID | 20191030102541.16222-1-lokeshvutla@ti.com |
|---|---|
| State | Accepted |
| Commit | 7a540eeecc14b974e421ccdb26a242ccf87f3d49 |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [U-Boot] arm: caches: Disable mmu only if mmu is available | expand |
On Wed, Oct 30, 2019 at 03:55:41PM +0530, Lokesh Vutla wrote: > As part of disabling caches MMU as well gets disabled. But MMU is not > available on all armv7 cores like R5F. So disable MMU only if it is > available. > > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Applied to u-boot/master, thanks!
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index b2913e8165..47c223917a 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -235,12 +235,18 @@ static void cache_disable(uint32_t cache_bit) /* if cache isn;t enabled no need to disable */ if ((reg & CR_C) != CR_C) return; +#ifdef CONFIG_SYS_ARM_MMU /* if disabling data cache, disable mmu too */ cache_bit |= CR_M; +#endif } reg = get_cr(); +#ifdef CONFIG_SYS_ARM_MMU if (cache_bit == (CR_C | CR_M)) +#elif defined(CONFIG_SYS_ARM_MPU) + if (cache_bit == CR_C) +#endif flush_dcache_all(); set_cr(reg & ~cache_bit); }
As part of disabling caches MMU as well gets disabled. But MMU is not available on all armv7 cores like R5F. So disable MMU only if it is available. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> --- arch/arm/lib/cache-cp15.c | 6 ++++++ 1 file changed, 6 insertions(+)