| Message ID | 20190822062848.16482-1-uboot@andestech.com |
|---|---|
| State | Accepted |
| Commit | d58b0a6ee10710b259412fdeaf0eb24474af8401 |
| Delegated to: | Andes |
| Headers | show |
| Series | [U-Boot] riscv: andes_plic: init plic by scanning each cpu node | expand |
On Thu, Aug 22, 2019 at 2:35 PM Andes <uboot@andestech.com> wrote: > > From: Rick Chen <rick@andestech.com> > > Initialize plic driver by ofnode_for_each_subnode() instead > of cpu_get_count(). > > This way can support to skip some harts which maybe mark as > unavailable, but the cpu node exist indeed. > > Signed-off-by: Rick Chen <rick@andestech.com> > Cc: KC Lin <kclin@andestech.com> > --- > arch/riscv/lib/andes_plic.c | 36 +++++++++++++++++++++++++----------- > 1 file changed, 25 insertions(+), 11 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> I am not sure why you sent two patches that do the same? http://patchwork.ozlabs.org/patch/1150686/
On Thu, Aug 22, 2019 at 2:45 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > On Thu, Aug 22, 2019 at 2:35 PM Andes <uboot@andestech.com> wrote: > > > > From: Rick Chen <rick@andestech.com> > > > > Initialize plic driver by ofnode_for_each_subnode() instead > > of cpu_get_count(). > > > > This way can support to skip some harts which maybe mark as which may be marked > > unavailable, but the cpu node exist indeed. exist -> exists > > > > Signed-off-by: Rick Chen <rick@andestech.com> > > Cc: KC Lin <kclin@andestech.com> > > --- > > arch/riscv/lib/andes_plic.c | 36 +++++++++++++++++++++++++----------- > > 1 file changed, 25 insertions(+), 11 deletions(-) > > > > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> > > I am not sure why you sent two patches that do the same? > http://patchwork.ozlabs.org/patch/1150686/ If you get a chance to resend, please apply the commit message fix above. Regards, Bin
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c index 2ffe49a..28568e4 100644 --- a/arch/riscv/lib/andes_plic.c +++ b/arch/riscv/lib/andes_plic.c @@ -44,15 +44,12 @@ static int init_plic(void); } \ } while (0) -static int enable_ipi(int harts) +static int enable_ipi(int hart) { - int i; - int en = ENABLE_HART_IPI; + int en; - for (i = 0; i < harts; i++) { - en = en >> i; - writel(en, (void __iomem *)ENABLE_REG(gd->arch.plic, i)); - } + en = ENABLE_HART_IPI >> hart; + writel(en, (void __iomem *)ENABLE_REG(gd->arch.plic, hart)); return 0; } @@ -60,18 +57,35 @@ static int enable_ipi(int harts) static int init_plic(void) { struct udevice *dev; + ofnode node; int ret; + u32 reg; ret = uclass_find_first_device(UCLASS_CPU, &dev); if (ret) return ret; if (ret == 0 && dev) { - ret = cpu_get_count(dev); - if (ret < 0) - return ret; + ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) { + const char *device_type; + + device_type = ofnode_read_string(node, "device_type"); + if (!device_type) + continue; + + if (strcmp(device_type, "cpu")) + continue; + + /* skip if hart is marked as not available */ + if (!ofnode_is_available(node)) + continue; + + /* read hart ID of CPU */ + ret = ofnode_read_u32(node, "reg", ®); + if (ret == 0) + enable_ipi(reg); + } - enable_ipi(ret); return 0; }