| Message ID | 20171130012511.16333-9-andre.przywara@arm.com |
|---|---|
| State | RFC |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Nexell S5P6818 SoC support | expand |
On 29 November 2017 at 18:25, Andre Przywara <andre.przywara@arm.com> wrote: > From: Amit Singh Tomar <amittomer25@gmail.com> > > ARMv8 boards require a struct describing the memory regions for the > mandatory MMU setup. > Add the respective data for the Nexell S5P6818 SoC. > > Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > arch/arm/mach-nexell/Makefile | 1 + > arch/arm/mach-nexell/mmu-arm64.c | 39 +++++++++++++++++++++++++++++++++++++++ > 2 files changed, 40 insertions(+) > create mode 100644 arch/arm/mach-nexell/mmu-arm64.c Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/mach-nexell/Makefile b/arch/arm/mach-nexell/Makefile index bf103480bb..c4c8293cbc 100644 --- a/arch/arm/mach-nexell/Makefile +++ b/arch/arm/mach-nexell/Makefile @@ -5,3 +5,4 @@ # obj-y := board.o +obj-$(CONFIG_ARM64) += mmu-arm64.o diff --git a/arch/arm/mach-nexell/mmu-arm64.c b/arch/arm/mach-nexell/mmu-arm64.c new file mode 100644 index 0000000000..e7b4479c65 --- /dev/null +++ b/arch/arm/mach-nexell/mmu-arm64.c @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2017 Amit Singh Tomar <amittomer25@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> +#include <asm/armv8/mmu.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct mm_region nexell_s5p6818_mem_map[] = { + { + .virt = 0xc0000000UL, + .phys = 0xc0000000UL, + .size = 0x20000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_INNER_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN, + }, { + .virt = 0x40000000UL, + .phys = 0x40000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_OUTER_SHARE, + }, { + .virt = 0xFFFF0000ULL, + .phys = 0xFFFF0000ULL, + .size = 0x00010000ULL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_INNER_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + }, +}; + +struct mm_region *mem_map = nexell_s5p6818_mem_map;