| Message ID | 20171130012511.16333-8-andre.przywara@arm.com |
|---|---|
| State | RFC |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Nexell S5P6818 SoC support | expand |
On 29 November 2017 at 18:25, Andre Przywara <andre.przywara@arm.com> wrote: > The primary boot loaders provided by the SoC vendor or derived from that > use an image format called "NSIH" to learn the load address and size of > the boot payload. This header occupies 512 bytes, but contains only a > few essential words of information. > Use the boot0 feature to prepend this header before the actual U-Boot > proper. We automatically fill it with the required information, also > add a branch instruction to be able to enter at the beginning of the > header. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > arch/arm/Kconfig | 1 + > arch/arm/include/asm/arch-nexell/boot0.h | 35 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c11e3f1f85..b0f3ee7289 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -655,6 +655,7 @@ config ARCH_MX5 config ARCH_NEXELL bool "Nexell S5P support" select ARM64 + select ENABLE_ARM_SOC_BOOT0_HOOK config ARCH_QEMU bool "QEMU Virtual Platform" diff --git a/arch/arm/include/asm/arch-nexell/boot0.h b/arch/arm/include/asm/arch-nexell/boot0.h new file mode 100644 index 0000000000..b2adb06b4c --- /dev/null +++ b/arch/arm/include/asm/arch-nexell/boot0.h @@ -0,0 +1,35 @@ +/* + * Nexell NSIH header, to allow loading U-Boot from secondboot. + * + * Both the proprietary and the GPL version of the first stage boot loader + * look for this magic header to determine the size and load address of + * the payload (similar to the information in an U-Boot image header). + * Make them happy by providing the essential bits: + * @0x040: device address: 0 for SDMMC + * @0x044: load size + * @0x048: load address + * @0x04c: launch address (entry point) + * @0x1fc: "NSIH" magic + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifdef CONFIG_ARM64 + b reset // jump over the header + .space 0x3c // fast forward to 0x40 +#else +_start: + ARM_VECTORS + .space 0x20 // fill up from 0x20 till 0x40 +#endif + .word 0 // device "address" (device ID) + .word (_end - _start) + 32768 // binary size + space for .dtb + .word CONFIG_SYS_TEXT_BASE // load address + .word CONFIG_SYS_TEXT_BASE // launch address + .space 0x1ac // fast forward till 0x1fc + .word 0x4849534e // "NSIH" magic + + // In case someone enters right after the header: +#ifdef CONFIG_ARM64 + b reset +#endif
The primary boot loaders provided by the SoC vendor or derived from that use an image format called "NSIH" to learn the load address and size of the boot payload. This header occupies 512 bytes, but contains only a few essential words of information. Use the boot0 feature to prepend this header before the actual U-Boot proper. We automatically fill it with the required information, also add a branch instruction to be able to enter at the beginning of the header. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/Kconfig | 1 + arch/arm/include/asm/arch-nexell/boot0.h | 35 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h