diff mbox series

[U-Boot,07/18] dm: pci: Use a 1:1 mapping for bus <-> phy addresses

Message ID 1528637118-32739-8-git-send-email-bmeng.cn@gmail.com
State Accepted
Delegated to: Bin Meng
Headers show
Series x86: efi: Fixes and enhancements to application and payload support | expand

Commit Message

Bin Meng June 10, 2018, 1:25 p.m. UTC 
From: Christian Gmeiner <christian.gmeiner@gmail.com>

If U-Boot gets used as coreboot payload all pci resources got
assigned by coreboot. If a dts without any pci ranges gets used
the dm is not able to access pci device memory. To get things
working make use of a 1:1 mapping for bus <-> phy addresses.

This change makes it possible to get the e1000 U-Boot driver
working on a sandybridge device where U-Boot is used as coreboot
payload.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

 drivers/pci/pci-uclass.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Simon Glass June 11, 2018, 2:54 p.m. UTC | #1 
On 10 June 2018 at 05:25, Bin Meng <bmeng.cn@gmail.com> wrote:
> From: Christian Gmeiner <christian.gmeiner@gmail.com>
>
> If U-Boot gets used as coreboot payload all pci resources got
> assigned by coreboot. If a dts without any pci ranges gets used
> the dm is not able to access pci device memory. To get things
> working make use of a 1:1 mapping for bus <-> phy addresses.
>
> This change makes it possible to get the e1000 U-Boot driver
> working on a sandybridge device where U-Boot is used as coreboot
> payload.
>
> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> [bmeng: fixed 'u-boot' in the commit message]
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
>  drivers/pci/pci-uclass.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng June 12, 2018, 1:07 p.m. UTC | #2 
On Mon, Jun 11, 2018 at 10:54 PM, Simon Glass <sjg@chromium.org> wrote:
> On 10 June 2018 at 05:25, Bin Meng <bmeng.cn@gmail.com> wrote:
>> From: Christian Gmeiner <christian.gmeiner@gmail.com>
>>
>> If U-Boot gets used as coreboot payload all pci resources got
>> assigned by coreboot. If a dts without any pci ranges gets used
>> the dm is not able to access pci device memory. To get things
>> working make use of a 1:1 mapping for bus <-> phy addresses.
>>
>> This change makes it possible to get the e1000 U-Boot driver
>> working on a sandybridge device where U-Boot is used as coreboot
>> payload.
>>
>> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
>> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
>> [bmeng: fixed 'u-boot' in the commit message]
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>>  drivers/pci/pci-uclass.c | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86, thanks!
diff mbox series

Patch

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index de4c71b..46e9c71 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1182,6 +1182,11 @@  static int _dm_pci_bus_to_phys(struct udevice *ctlr,
 	struct pci_region *res;
 	int i;
 
+	if (hose->region_count == 0) {
+		*pa = bus_addr;
+		return 0;
+	}
+
 	for (i = 0; i < hose->region_count; i++) {
 		res = &hose->regions[i];
 
@@ -1245,6 +1250,11 @@  int _dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr,
 	ctlr = pci_get_controller(dev);
 	hose = dev_get_uclass_priv(ctlr);
 
+	if (hose->region_count == 0) {
+		*ba = phys_addr;
+		return 0;
+	}
+
 	for (i = 0; i < hose->region_count; i++) {
 		res = &hose->regions[i];