[U-Boot,05/20] arm: socfpga: add A10 defines

Message ID	1487756858-16730-6-git-send-email-ley.foon.tan@intel.com
State	Superseded
Delegated to:	Marek Vasut
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Ley Foon Tan <ley.foon.tan@intel.com> To: u-boot@lists.denx.de, Marek Vasut <marex@denx.de> Date: Wed, 22 Feb 2017 17:47:23 +0800 Message-Id: <1487756858-16730-6-git-send-email-ley.foon.tan@intel.com> In-Reply-To: <1487756858-16730-1-git-send-email-ley.foon.tan@intel.com> References: <1487756858-16730-1-git-send-email-ley.foon.tan@intel.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>, Chin Liang See <chin.liang.see@intel.com> Subject: [U-Boot] [PATCH 05/20] arm: socfpga: add A10 defines Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>

Message ID

1487756858-16730-6-git-send-email-ley.foon.tan@intel.com

State

Superseded

Delegated to:

Marek Vasut

Headers

From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de,
	Marek Vasut <marex@denx.de>
Date: Wed, 22 Feb 2017 17:47:23 +0800
Message-Id: <1487756858-16730-6-git-send-email-ley.foon.tan@intel.com>
In-Reply-To: <1487756858-16730-1-git-send-email-ley.foon.tan@intel.com>
References: <1487756858-16730-1-git-send-email-ley.foon.tan@intel.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>,
	Chin Liang See <chin.liang.see@intel.com>
Subject: [U-Boot] [PATCH 05/20] arm: socfpga: add A10 defines
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Commit Message

Ley Foon Tan Feb. 22, 2017, 9:47 a.m. UTC

add i2c, timer and other A10 defines.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Marek Vasut Feb. 25, 2017, 9:20 p.m. UTC | #1

On 02/22/2017 10:47 AM, Ley Foon Tan wrote:
> add i2c, timer and other A10 defines.

Start with capital letter please.

> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> ---
>  arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> index a7056d4..d3dea0b 100644
> --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright (C) 2014 Altera Corporation <www.altera.com>
> + * Copyright (C) 2014-2017 Altera Corporation <www.altera.com>
>   *
>   * SPDX-License-Identifier:	GPL-2.0+
>   */
> @@ -29,14 +29,20 @@
>  #define SOCFPGA_MPUL2_ADDRESS			0xfffff000
>  #define SOCFPGA_I2C0_ADDRESS			0xffc02200
>  #define SOCFPGA_I2C1_ADDRESS			0xffc02300
> +#define SOCFPGA_I2C2_ADDRESS			0xffc02400
> +#define SOCFPGA_I2C3_ADDRESS			0xffc02500
> +#define SOCFPGA_I2C4_ADDRESS			0xffc02600

Shouldn't all this come from DT already ? What's the point of having
those macros at all ?

>  #define SOCFPGA_ECC_OCRAM_ADDRESS		0xff8c3000
>  #define SOCFPGA_UART0_ADDRESS			0xffc02000
>  #define SOCFPGA_OSC1TIMER0_ADDRESS		0xffd00000
> +#define SOCFPGA_OSC1TIMER1_ADDRESS		0xffd00100
>  #define SOCFPGA_CLKMGR_ADDRESS			0xffd04000
>  #define SOCFPGA_RSTMGR_ADDRESS			0xffd05000
>  
>  #define SOCFPGA_SDR_ADDRESS			0xffcfb000
> +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST        	0xffd11000
> +#define SOCFPGA_NOC_FW_H2F_SCR_OFST		0xffd13500
>  #define SOCFPGA_SDR_SCHEDULER_ADDRESS		0xffd12400
>  #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS	0xffd13200
>  #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS	0xffd13300
>

Ley Foon Tan Feb. 27, 2017, 9:45 a.m. UTC | #2

On Sab, 2017-02-25 at 22:20 +0100, Marek Vasut wrote:
> On 02/22/2017 10:47 AM, Ley Foon Tan wrote:
> > 
> > add i2c, timer and other A10 defines.
> Start with capital letter please.
> 
> > 
> > Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> > ---
> >  arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > index a7056d4..d3dea0b 100644
> > --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > @@ -1,5 +1,5 @@
> >  /*
> > - * Copyright (C) 2014 Altera Corporation <www.altera.com>
> > + * Copyright (C) 2014-2017 Altera Corporation <www.altera.com>
> >   *
> >   * SPDX-License-Identifier:	GPL-2.0+
> >   */
> > @@ -29,14 +29,20 @@
> >  #define SOCFPGA_MPUL2_ADDRESS			0xfffff000
> >  #define SOCFPGA_I2C0_ADDRESS			0xffc02200
> >  #define SOCFPGA_I2C1_ADDRESS			0xffc02300
> > +#define SOCFPGA_I2C2_ADDRESS			0xffc02400
> > +#define SOCFPGA_I2C3_ADDRESS			0xffc02500
> > +#define SOCFPGA_I2C4_ADDRESS			0xffc02600
> Shouldn't all this come from DT already ? What's the point of having
> those macros at all ?
They are used for CONFIG_SYS_I2C_BASE in socfpag_common.h now. I will
add #ifndef CONFIG_DM_I2C switch in socfpga_common.h and remove these
defines from this file.
> 
> > 
> >  #define SOCFPGA_ECC_OCRAM_ADDRESS		0xff8c3000
> >  #define SOCFPGA_UART0_ADDRESS			0xffc02000
> >  #define SOCFPGA_OSC1TIMER0_ADDRESS		0xffd00000
> > +#define SOCFPGA_OSC1TIMER1_ADDRESS		0xffd00100
> >  #define SOCFPGA_CLKMGR_ADDRESS			0xffd04000
> >  #define SOCFPGA_RSTMGR_ADDRESS			0xffd05000
> >  
> >  #define SOCFPGA_SDR_ADDRESS			0xffcfb000
> > +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST        	0xffd11000
> > +#define SOCFPGA_NOC_FW_H2F_SCR_OFST		0xffd13500
> >  #define SOCFPGA_SDR_SCHEDULER_ADDRESS		0xffd12400
> >  #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS	0xffd13200
> >  #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS	0xffd13300
> > 
>

Marek Vasut Feb. 27, 2017, 10 a.m. UTC | #3

On 02/27/2017 10:45 AM, Ley Foon Tan wrote:
> On Sab, 2017-02-25 at 22:20 +0100, Marek Vasut wrote:
>> On 02/22/2017 10:47 AM, Ley Foon Tan wrote:
>>>
>>> add i2c, timer and other A10 defines.
>> Start with capital letter please.
>>
>>>
>>> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
>>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
>>> ---
>>>  arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++++++-
>>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
>>> b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
>>> index a7056d4..d3dea0b 100644
>>> --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
>>> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
>>> @@ -1,5 +1,5 @@
>>>  /*
>>> - * Copyright (C) 2014 Altera Corporation <www.altera.com>
>>> + * Copyright (C) 2014-2017 Altera Corporation <www.altera.com>
>>>   *
>>>   * SPDX-License-Identifier:	GPL-2.0+
>>>   */
>>> @@ -29,14 +29,20 @@
>>>  #define SOCFPGA_MPUL2_ADDRESS			0xfffff000
>>>  #define SOCFPGA_I2C0_ADDRESS			0xffc02200
>>>  #define SOCFPGA_I2C1_ADDRESS			0xffc02300
>>> +#define SOCFPGA_I2C2_ADDRESS			0xffc02400
>>> +#define SOCFPGA_I2C3_ADDRESS			0xffc02500
>>> +#define SOCFPGA_I2C4_ADDRESS			0xffc02600
>> Shouldn't all this come from DT already ? What's the point of having
>> those macros at all ?
> They are used for CONFIG_SYS_I2C_BASE in socfpag_common.h now. I will
> add #ifndef CONFIG_DM_I2C switch in socfpga_common.h and remove these
> defines from this file.

Ah hmmmmm, ok, then keep them. Unless you want to convert the i2c driver
to DM of course, which would be more then welcome.

>>
>>>
>>>  #define SOCFPGA_ECC_OCRAM_ADDRESS		0xff8c3000
>>>  #define SOCFPGA_UART0_ADDRESS			0xffc02000
>>>  #define SOCFPGA_OSC1TIMER0_ADDRESS		0xffd00000
>>> +#define SOCFPGA_OSC1TIMER1_ADDRESS		0xffd00100
>>>  #define SOCFPGA_CLKMGR_ADDRESS			0xffd04000
>>>  #define SOCFPGA_RSTMGR_ADDRESS			0xffd05000
>>>  
>>>  #define SOCFPGA_SDR_ADDRESS			0xffcfb000
>>> +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST        	0xffd11000
>>> +#define SOCFPGA_NOC_FW_H2F_SCR_OFST		0xffd13500
>>>  #define SOCFPGA_SDR_SCHEDULER_ADDRESS		0xffd12400
>>>  #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS	0xffd13200
>>>  #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS	0xffd13300
>>>
>>

Ley Foon Tan Feb. 27, 2017, 10:05 a.m. UTC | #4

On Isn, 2017-02-27 at 11:00 +0100, Marek Vasut wrote:
> On 02/27/2017 10:45 AM, Ley Foon Tan wrote:
> > 
> > On Sab, 2017-02-25 at 22:20 +0100, Marek Vasut wrote:
> > > 
> > > On 02/22/2017 10:47 AM, Ley Foon Tan wrote:
> > > > 
> > > > 
> > > > add i2c, timer and other A10 defines.
> > > Start with capital letter please.
> > > 
> > > > 
> > > > 
> > > > Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> > > > ---
> > > >  arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8
> > > > +++++++-
> > > >  1 file changed, 7 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > > > b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > > > index a7056d4..d3dea0b 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
> > > > @@ -1,5 +1,5 @@
> > > >  /*
> > > > - * Copyright (C) 2014 Altera Corporation <www.altera.com>
> > > > + * Copyright (C) 2014-2017 Altera Corporation <www.altera.com>
> > > >   *
> > > >   * SPDX-License-Identifier:	GPL-2.0+
> > > >   */
> > > > @@ -29,14 +29,20 @@
> > > >  #define SOCFPGA_MPUL2_ADDRESS			0xfffff00
> > > > 0
> > > >  #define SOCFPGA_I2C0_ADDRESS			0xffc02200
> > > >  #define SOCFPGA_I2C1_ADDRESS			0xffc02300
> > > > +#define SOCFPGA_I2C2_ADDRESS			0xffc02400
> > > > +#define SOCFPGA_I2C3_ADDRESS			0xffc02500
> > > > +#define SOCFPGA_I2C4_ADDRESS			0xffc02600
> > > Shouldn't all this come from DT already ? What's the point of
> > > having
> > > those macros at all ?
> > They are used for CONFIG_SYS_I2C_BASE in socfpag_common.h now. I
> > will
> > add #ifndef CONFIG_DM_I2C switch in socfpga_common.h and remove
> > these
> > defines from this file.
> Ah hmmmmm, ok, then keep them. Unless you want to convert the i2c
> driver
> to DM of course, which would be more then welcome.
Then I will keep them for now. Yes, converting to DM is better, we will
try to that when enabling i2c.
> 
> > 
> > > 
> > > 
> > > > 
> > > > 
> > > >  #define SOCFPGA_ECC_OCRAM_ADDRESS		0xff8c3000
> > > >  #define SOCFPGA_UART0_ADDRESS			0xffc0200
> > > > 0
> > > >  #define SOCFPGA_OSC1TIMER0_ADDRESS		0xffd00000
> > > > +#define SOCFPGA_OSC1TIMER1_ADDRESS		0xffd00100
> > > >  #define SOCFPGA_CLKMGR_ADDRESS			0xffd040
> > > > 00
> > > >  #define SOCFPGA_RSTMGR_ADDRESS			0xffd050
> > > > 00
> > > >  
> > > >  #define SOCFPGA_SDR_ADDRESS			0xffcfb000
> > > > +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST        	0xffd11000
> > > > +#define SOCFPGA_NOC_FW_H2F_SCR_OFST		0xffd13500
> > > >  #define SOCFPGA_SDR_SCHEDULER_ADDRESS		0xffd1240
> > > > 0
> > > >  #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS	0xffd13200
> > > >  #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS	0xffd1330
> > > > 0
> > > > 
> 
Thanks

Regards
Ley Foon

diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
index a7056d4..d3dea0b 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
@@ -1,5 +1,5 @@ 
 /*
- * Copyright (C) 2014 Altera Corporation <www.altera.com>
+ * Copyright (C) 2014-2017 Altera Corporation <www.altera.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -29,14 +29,20 @@ 
 #define SOCFPGA_MPUL2_ADDRESS			0xfffff000
 #define SOCFPGA_I2C0_ADDRESS			0xffc02200
 #define SOCFPGA_I2C1_ADDRESS			0xffc02300
+#define SOCFPGA_I2C2_ADDRESS			0xffc02400
+#define SOCFPGA_I2C3_ADDRESS			0xffc02500
+#define SOCFPGA_I2C4_ADDRESS			0xffc02600
 
 #define SOCFPGA_ECC_OCRAM_ADDRESS		0xff8c3000
 #define SOCFPGA_UART0_ADDRESS			0xffc02000
 #define SOCFPGA_OSC1TIMER0_ADDRESS		0xffd00000
+#define SOCFPGA_OSC1TIMER1_ADDRESS		0xffd00100
 #define SOCFPGA_CLKMGR_ADDRESS			0xffd04000
 #define SOCFPGA_RSTMGR_ADDRESS			0xffd05000
 
 #define SOCFPGA_SDR_ADDRESS			0xffcfb000
+#define SOCFPGA_NOC_L4_PRIV_FLT_OFST        	0xffd11000
+#define SOCFPGA_NOC_FW_H2F_SCR_OFST		0xffd13500
 #define SOCFPGA_SDR_SCHEDULER_ADDRESS		0xffd12400
 #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS	0xffd13200
 #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS	0xffd13300

[U-Boot,05/20] arm: socfpga: add A10 defines

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