| Message ID | 1481612064-10336-3-git-send-email-Zhiqiang.Hou@nxp.com |
|---|---|
| State | Accepted |
| Delegated to: | York Sun |
| Headers | show |
On Tue, Dec 13, 2016 at 2:54 PM, Zhiqiang Hou <Zhiqiang.Hou@nxp.com> wrote: > From: Minghuan Lian <Minghuan.Lian@nxp.com> > > There may be multiple PCIe controllers in a SoC. > It is not correct that always calling pci_bus_to_hose(0) to get > the first PCIe controller for the PCIe device connected other > controllers. We just remove this calling because hose always point > the correct PCIe controller. > > Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Simon Glass <sjg@chromium.org> > --- > V5: > - No change > > drivers/pci/pci_common.c | 17 +++++++---------- > 1 file changed, 7 insertions(+), 10 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Hi Bin, Thanks for your review! B.R Zhiqiang > -----Original Message----- > From: Bin Meng [mailto:bmeng.cn@gmail.com] > Sent: 2016年12月13日 15:48 > To: Z.Q. Hou <zhiqiang.hou@nxp.com> > Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Albert ARIBAUD > <albert.u.boot@aribaud.net>; Prabhakar Kushwaha > <prabhakar.kushwaha@nxp.com>; Alison Wang <alison.wang@nxp.com>; > Sumit Garg <sumit.garg@nxp.com>; Ruchika Gupta <ruchika.gupta@nxp.com>; > york sun <york.sun@nxp.com>; M.H. Lian <minghuan.lian@nxp.com>; Simon > Glass <sjg@chromium.org>; Mingkai Hu <mingkai.hu@nxp.com> > Subject: Re: [PATCHv5 03/17] dm: pci: remove pci_bus_to_hose(0) calling > > On Tue, Dec 13, 2016 at 2:54 PM, Zhiqiang Hou <Zhiqiang.Hou@nxp.com> > wrote: > > From: Minghuan Lian <Minghuan.Lian@nxp.com> > > > > There may be multiple PCIe controllers in a SoC. > > It is not correct that always calling pci_bus_to_hose(0) to get the > > first PCIe controller for the PCIe device connected other controllers. > > We just remove this calling because hose always point the correct PCIe > > controller. > > > > Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > Reviewed-by: Simon Glass <sjg@chromium.org> > > --- > > V5: > > - No change > > > > drivers/pci/pci_common.c | 17 +++++++---------- > > 1 file changed, 7 insertions(+), 10 deletions(-) > > > > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c index 1755914..6526de8 100644 --- a/drivers/pci/pci_common.c +++ b/drivers/pci/pci_common.c @@ -181,11 +181,6 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose, return phys_addr; } -#ifdef CONFIG_DM_PCI - /* The root controller has the region information */ - hose = pci_bus_to_hose(0); -#endif - /* * if PCI_REGION_MEM is set we do a two pass search with preference * on matches that don't have PCI_REGION_SYS_MEMORY set @@ -236,6 +231,13 @@ int __pci_hose_phys_to_bus(struct pci_controller *hose, return 1; } +/* + * pci_hose_phys_to_bus(): Convert physical address to bus address + * @hose: PCI hose of the root PCI controller + * @phys_addr: physical address to convert + * @flags: flags of pci regions + * @return bus address if OK, 0 on error + */ pci_addr_t pci_hose_phys_to_bus(struct pci_controller *hose, phys_addr_t phys_addr, unsigned long flags) @@ -248,11 +250,6 @@ pci_addr_t pci_hose_phys_to_bus(struct pci_controller *hose, return bus_addr; } -#ifdef CONFIG_DM_PCI - /* The root controller has the region information */ - hose = pci_bus_to_hose(0); -#endif - /* * if PCI_REGION_MEM is set we do a two pass search with preference * on matches that don't have PCI_REGION_SYS_MEMORY set