| Message ID | 1449563070-5761-5-git-send-email-aneesh.bansal@freescale.com |
|---|---|
| State | Accepted |
| Delegated to: | York Sun |
| Headers | show |
On 12/08/2015 04:24 PM, Aneesh Bansal wrote: > For Setting and clearing the bits in SEC Block registers > sec_clrbits32() and sec_setbits32() are used which work as > per endianness of CAAM block. > So these must be used with SEC register address as argument. > If the value is read in a local variable, then the functions > will not behave correctly where endianness of CAAM and core is > different. > > Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> > CC: Alex Porosanu <alexandru.porosanu@freescale.com> > --- > Changes in v5: None > > Changes in v4: None > > Changes in v3: None > > Changes in v2: None (New Patch set created with an additional patch) Applied to fsl-qoriq master. Awaiting upstream. York
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index f63eacb..b553e3c 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -470,17 +470,13 @@ static void kick_trng(int ent_delay) sec_out32(&rng->rtfreqmin, ent_delay >> 2); /* disable maximum frequency count */ sec_out32(&rng->rtfreqmax, RTFRQMAX_DISABLE); - /* read the control register */ - val = sec_in32(&rng->rtmctl); /* * select raw sampling in both entropy shifter * and statistical checker */ - sec_setbits32(&val, RTMCTL_SAMP_MODE_RAW_ES_SC); + sec_setbits32(&rng->rtmctl, RTMCTL_SAMP_MODE_RAW_ES_SC); /* put RNG4 into run mode */ - sec_clrbits32(&val, RTMCTL_PRGM); - /* write back the control register */ - sec_out32(&rng->rtmctl, val); + sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); } static int rng_init(void)
For Setting and clearing the bits in SEC Block registers sec_clrbits32() and sec_setbits32() are used which work as per endianness of CAAM block. So these must be used with SEC register address as argument. If the value is read in a local variable, then the functions will not behave correctly where endianness of CAAM and core is different. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> CC: Alex Porosanu <alexandru.porosanu@freescale.com> --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None (New Patch set created with an additional patch) drivers/crypto/fsl/jr.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-)