Message ID | 1416014328-26324-22-git-send-email-sjg@chromium.org |
---|---|
State | Accepted |
Delegated to: | Simon Glass |
Headers | show |
On 14 November 2014 at 18:18, Simon Glass <sjg@chromium.org> wrote: > Add the requires settings to enable SATA on link. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > Changes in v2: None > > arch/x86/dts/link.dts | 7 +++++++ > include/configs/chromebook_link.h | 1 - > 2 files changed, 7 insertions(+), 1 deletion(-) Applied to u-boot-x86.
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 28cef07..d3c94e0 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -164,6 +164,13 @@ }; pci { + sata { + compatible = "intel,pantherpoint-ahci"; + intel,sata-mode = "ahci"; + intel,sata-port-map = <1>; + intel,sata-port0-gen3-tx = <0x00880a7f>; + }; + lpc { compatible = "intel,lpc"; #address-cells = <1>; diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 055b3ac..e9efd7c 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -52,7 +52,6 @@ #undef CONFIG_CMD_SF #undef CONFIG_USB_EHCI #undef CONFIG_CMD_USB -#undef CONFIG_CMD_SCSI #define CONFIG_PCI_MEM_BUS 0xe0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
Add the requires settings to enable SATA on link. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v2: None arch/x86/dts/link.dts | 7 +++++++ include/configs/chromebook_link.h | 1 - 2 files changed, 7 insertions(+), 1 deletion(-)