From patchwork Sat Nov 15 01:18:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 411072 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 23F831400A0 for ; Sat, 15 Nov 2014 12:20:42 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9C8294BA9E; Sat, 15 Nov 2014 02:20:17 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id gRUoySSEQcBw; Sat, 15 Nov 2014 02:20:17 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5C9CF4BAA7; Sat, 15 Nov 2014 02:19:52 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2F0F94BA56 for ; Sat, 15 Nov 2014 02:19:11 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jnRzqL-2HYyK for ; Sat, 15 Nov 2014 02:19:11 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ob0-f201.google.com (mail-ob0-f201.google.com [209.85.214.201]) by theia.denx.de (Postfix) with ESMTPS id 723234BA4F for ; Sat, 15 Nov 2014 02:19:06 +0100 (CET) Received: by mail-ob0-f201.google.com with SMTP id nt9so2496105obb.4 for ; Fri, 14 Nov 2014 17:19:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4tGuDwBBmJOl7R8w8wMpMzIe0aX4GrAb4gT2Kij9TzQ=; b=b2fhU0dkGx+Q7n+BnwPnHDY4C5U2Vm7pEBZCvJCKblr1YOJqPoB+xw+MccvTNmiPHI ozs9VaFZUCaaliGYV5B/cfvzyGvac1QBNUPrntnD8iTZpMLiB7vemceIkoMKoMV/NLIw Crba2FOTeDQ06zyyNXXKUeWlBeN4/O41BlJqBT/mfZqMEJZnisfmgJn6nG3R0ErJxbRS xNEHKmTBqGMpNEBXxDCmaKhYe/3ty6KxZ4duVEZTwCfboNe+XO2wUlicH7M7z66Ii4GV oFYTj1SS5ZOszdkNGTgdIYmYxYpLs2TK1uGSoxD/wfC+KuWN5G1ELbFQic5n3gcjeQEM LZfQ== X-Gm-Message-State: ALoCoQkBmVo2oBsfyS2i9z/uKQLwkmlAn1bi4aCMtpB9/V7VTjxacn8H0gMslLA5jsCbMvIA7DxX X-Received: by 10.182.72.163 with SMTP id e3mr54889043obv.27.1416014345233; Fri, 14 Nov 2014 17:19:05 -0800 (PST) Received: from corpmail-nozzle1-2.hot.corp.google.com ([100.108.1.103]) by gmr-mx.google.com with ESMTPS id n63si1259707yho.5.2014.11.14.17.19.04 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Nov 2014 17:19:05 -0800 (PST) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-2.hot.corp.google.com with ESMTP id J7wDphiB.3; Fri, 14 Nov 2014 17:19:05 -0800 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 866E9221027; Fri, 14 Nov 2014 18:19:04 -0700 (MST) From: Simon Glass To: U-Boot Mailing List Date: Fri, 14 Nov 2014 18:18:39 -0700 Message-Id: <1416014328-26324-22-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1416014328-26324-1-git-send-email-sjg@chromium.org> References: <1416014328-26324-1-git-send-email-sjg@chromium.org> Cc: Graeme Russ Subject: [U-Boot] [PATCH v2 21/30] x86: dts: Add SATA settings for link X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add the requires settings to enable SATA on link. Signed-off-by: Simon Glass --- Changes in v2: None arch/x86/dts/link.dts | 7 +++++++ include/configs/chromebook_link.h | 1 - 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 28cef07..d3c94e0 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -164,6 +164,13 @@ }; pci { + sata { + compatible = "intel,pantherpoint-ahci"; + intel,sata-mode = "ahci"; + intel,sata-port-map = <1>; + intel,sata-port0-gen3-tx = <0x00880a7f>; + }; + lpc { compatible = "intel,lpc"; #address-cells = <1>; diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 055b3ac..e9efd7c 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -52,7 +52,6 @@ #undef CONFIG_CMD_SF #undef CONFIG_USB_EHCI #undef CONFIG_CMD_USB -#undef CONFIG_CMD_SCSI #define CONFIG_PCI_MEM_BUS 0xe0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS