diff mbox

[U-Boot,2/3] nds32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment

Message ID 1319449593-2427-2-git-send-email-macpaul@andestech.com
State Accepted
Commit 466e73b19b34a1500303faffc4b17d849438fad0
Delegated to: Macpaul Lin
Headers show

Commit Message

Macpaul Lin Oct. 24, 2011, 9:46 a.m. UTC
Add ARCH_DMA_MINALIGN definition to asm/cache.h

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
 arch/nds32/include/asm/cache.h |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

Comments

Anton staaf Oct. 24, 2011, 5:16 p.m. UTC | #1
On Mon, Oct 24, 2011 at 2:46 AM, Macpaul Lin <macpaul@andestech.com> wrote:
> Add ARCH_DMA_MINALIGN definition to asm/cache.h
>
> Signed-off-by: Macpaul Lin <macpaul@andestech.com>

Acked-by: Anton Staaf <robotboy@chromium.org>

> ---
>  arch/nds32/include/asm/cache.h |   11 +++++++++++
>  1 files changed, 11 insertions(+), 0 deletions(-)
>
> diff --git a/arch/nds32/include/asm/cache.h b/arch/nds32/include/asm/cache.h
> index d769196..fc22c7b 100644
> --- a/arch/nds32/include/asm/cache.h
> +++ b/arch/nds32/include/asm/cache.h
> @@ -51,4 +51,15 @@ DEFINE_GET_SYS_REG(DCM_CFG);
>  #define DCM_CFG_OFF_DSZ        6       /* D-cache line size */
>  #define DCM_CFG_MSK_DSZ        (0x7UL << DCM_CFG_OFF_DSZ)
>
> +/*
> + * The current upper bound for NDS32 L1 data cache line sizes is 32 bytes.
> + * We use that value for aligning DMA buffers unless the board config has
> + * specified an alternate cache line size.
> + */
> +#ifdef CONFIG_SYS_CACHELINE_SIZE
> +#define ARCH_DMA_MINALIGN      CONFIG_SYS_CACHELINE_SIZE
> +#else
> +#define ARCH_DMA_MINALIGN      32
> +#endif
> +
>  #endif /* _ASM_CACHE_H */
> --
> 1.7.3.5
>
>
Macpaul Lin Oct. 28, 2011, 4:46 a.m. UTC | #2
Hi Wolfgang,

2011/10/25 Anton Staaf <robotboy@chromium.org>:
> On Mon, Oct 24, 2011 at 2:46 AM, Macpaul Lin <macpaul@andestech.com> wrote:
>> Add ARCH_DMA_MINALIGN definition to asm/cache.h
>>
>> Signed-off-by: Macpaul Lin <macpaul@andestech.com>
>
> Acked-by: Anton Staaf <robotboy@chromium.org>
>

Since the NDS32 has been come into mainline.
Could I pick up this kind of simple changes of reviewed patches which
are related to NDS32 only by myself,
and then send pull-request to you?
Hope this could reducing your loading and gain some benefits

Thanks.
Mike Frysinger Oct. 31, 2011, 12:40 a.m. UTC | #3
On Friday 28 October 2011 00:46:38 馬克泡 wrote:
> Since the NDS32 has been come into mainline.
> Could I pick up this kind of simple changes of reviewed patches which
> are related to NDS32 only by myself,
> and then send pull-request to you?
> Hope this could reducing your loading and gain some benefits

you've got a maintainer tree now:
	http://git.denx.de/?p=u-boot/u-boot-nds32.git

so you should be gathering all the NDS32 patches and pushing to wolfgang.  
please see the documentation here for the process:
	http://www.denx.de/wiki/U-Boot/DevelopmentProcess

short answer:
	- fixes should get pushed at any time
	- everything else should get pushed during merge window
-mike
Macpaul Lin Nov. 1, 2011, 3:28 a.m. UTC | #4
Hi Mike,

2011/10/31 Mike Frysinger <vapier@gentoo.org>:
> On Friday 28 October 2011 00:46:38 馬克泡 wrote:
> you've got a maintainer tree now:
>        http://git.denx.de/?p=u-boot/u-boot-nds32.git
>
> so you should be gathering all the NDS32 patches and pushing to wolfgang.
> please see the documentation here for the process:
>        http://www.denx.de/wiki/U-Boot/DevelopmentProcess
>
> short answer:
>        - fixes should get pushed at any time
>        - everything else should get pushed during merge window
> -mike
>

Thanks for your hint.
Will do patch collections soon.
Macpaul Lin Nov. 1, 2011, 4:35 a.m. UTC | #5
Hi Macpaul,

2011/10/25 Anton Staaf <robotboy@chromium.org>:
> On Mon, Oct 24, 2011 at 2:46 AM, Macpaul Lin <macpaul@andestech.com> wrote:
>> Add ARCH_DMA_MINALIGN definition to asm/cache.h
>>
>> Signed-off-by: Macpaul Lin <macpaul@andestech.com>
>
> Acked-by: Anton Staaf <robotboy@chromium.org>
>

Applied to u-boot-nds32/master, thanks.

Best regards,
Macpaul Lin
diff mbox

Patch

diff --git a/arch/nds32/include/asm/cache.h b/arch/nds32/include/asm/cache.h
index d769196..fc22c7b 100644
--- a/arch/nds32/include/asm/cache.h
+++ b/arch/nds32/include/asm/cache.h
@@ -51,4 +51,15 @@  DEFINE_GET_SYS_REG(DCM_CFG);
 #define DCM_CFG_OFF_DSZ	6	/* D-cache line size */
 #define DCM_CFG_MSK_DSZ	(0x7UL << DCM_CFG_OFF_DSZ)
 
+/*
+ * The current upper bound for NDS32 L1 data cache line sizes is 32 bytes.
+ * We use that value for aligning DMA buffers unless the board config has
+ * specified an alternate cache line size.
+ */
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+#define ARCH_DMA_MINALIGN	CONFIG_SYS_CACHELINE_SIZE
+#else
+#define ARCH_DMA_MINALIGN	32
+#endif
+
 #endif /* _ASM_CACHE_H */