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[U-Boot,v3,00/24] omap_hsmmc: Add support for HS200 and UHS modes

Message ID 1517324513-13875-1-git-send-email-jjhiblot@ti.com
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Series omap_hsmmc: Add support for HS200 and UHS modes | expand

Message

Jean-Jacques Hiblot Jan. 30, 2018, 3:01 p.m. UTC
This series adds the missing bits to enable the UHS and HS200 modes
for the TI platforms.

Enabling support for high speed modes on omap5 requires implementing:
 * io signal voltage selection
 * tuning support
 * pin configuration (IO delays)

The few last patches enable the high speed modes for the DRA7 platforms and
also take care of disabling those modes in the dts for the platforms that
cannot support either the UHS or the HS200 because the voltage regulators
on board would not allow using those modes (not a SOC limitation).

With this in place we observe significant improvements in the performances:
on a DRA72 evm:
eMMC HS200: 124 MB/s
eMMC DDR52: 78 MB/s
sd   SDR104: 71 MB/s
sd   SDR50: 44 MB/s
For the record, the original performances were:
SD High speed: 18 MB/s
MMC High speed: 18 MB/s

This series has been tested on:
* DRA71-evm
* DRA72-evm
* DRA7x-evm
* DRA76-evm
* AM57x-evm
* Beaglebone Black (dt and non-dt)

Changes in v2:
- rebased on top of u-boot/master
- enable the H200 and UHS support in the defconfigs of the DRA7 platforms

Changes in v3:
- in omap_hsmmc_set_clock(), if mmc->clock is zero, use the max divider.
- prefer the usage of the BIT() macro over the construct ( 1 << x )
- fixed build issue with omap3 platforms

Jean-Jacques Hiblot (13):
  mmc: omap_hsmmc: cleanup clock configuration
  mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
  mmc: omap_hsmmc: Add tuning support
  mmc: omap_hsmmc: Workaround for errata id i802
  mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
  mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
  mmc: omap_hsmmc: update mmc->clock with the actual bus speed
  mmc: omap_hsmmc: implement send_init_stream callback
  mmc: omap_hsmmc: add signal voltage selection support
  ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes
  dts: am57xx-beagle-x15: disable UHS and HS200 support
  dts: am57xx-idk: disable HS200 support
  configs: dra7xx_evm/dra7xx_hs_evm: Enable MMC HS200 and SD UHS support

Kishon Vijay Abraham I (11):
  mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
  mmc: omap_hsmmc: add support to set default io voltage
  mmc: omap_hsmmc: Enable DDR mode support
  mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
  ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
  mmc: omap_hsmmc: Add support to set IODELAY values
  mmc: omap_hsmmc: Add support to get pinctrl values and max frequency
    for different hw revisions
  mmc: omap_hsmmc: allow mmc clock to be gated
  ARM: OMAP5: set mmc clock frequency to 192MHz
  ARM: dts: DRA7: use new dra7-specific compatible string
  ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1

 arch/arm/dts/am57xx-beagle-x15.dts               |   6 +
 arch/arm/dts/am57xx-idk-common.dtsi              |   2 +
 arch/arm/dts/dra7.dtsi                           |  22 +-
 arch/arm/include/asm/arch-omap5/clock.h          |   2 +-
 arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h |   3 +
 arch/arm/include/asm/arch-omap5/sys_proto.h      |   7 +
 arch/arm/include/asm/omap_mmc.h                  |  59 +-
 arch/arm/mach-omap2/omap5/dra7xx_iodelay.c       |  30 +
 arch/arm/mach-omap2/omap5/hw_data.c              |  10 +-
 board/ti/am57xx/board.c                          |  30 +
 board/ti/dra7xx/evm.c                            |  29 +
 configs/dra7xx_evm_defconfig                     |   3 +
 configs/dra7xx_hs_evm_defconfig                  |   3 +
 drivers/mmc/omap_hsmmc.c                         | 952 +++++++++++++++++++++--
 include/configs/am57xx_evm.h                     |   2 -
 include/configs/dra7xx_evm.h                     |   2 -
 16 files changed, 1087 insertions(+), 75 deletions(-)

Comments

Jaehoon Chung Feb. 19, 2018, 11:23 a.m. UTC | #1
Hi JJ,

On 01/31/2018 12:01 AM, Jean-Jacques Hiblot wrote:
> 
> This series adds the missing bits to enable the UHS and HS200 modes
> for the TI platforms.
> 
> Enabling support for high speed modes on omap5 requires implementing:
>  * io signal voltage selection
>  * tuning support
>  * pin configuration (IO delays)
> 
> The few last patches enable the high speed modes for the DRA7 platforms and
> also take care of disabling those modes in the dts for the platforms that
> cannot support either the UHS or the HS200 because the voltage regulators
> on board would not allow using those modes (not a SOC limitation).
> 
> With this in place we observe significant improvements in the performances:
> on a DRA72 evm:
> eMMC HS200: 124 MB/s
> eMMC DDR52: 78 MB/s
> sd   SDR104: 71 MB/s
> sd   SDR50: 44 MB/s
> For the record, the original performances were:
> SD High speed: 18 MB/s
> MMC High speed: 18 MB/s
> 
> This series has been tested on:
> * DRA71-evm
> * DRA72-evm
> * DRA7x-evm
> * DRA76-evm
> * AM57x-evm
> * Beaglebone Black (dt and non-dt)
> 
> Changes in v2:
> - rebased on top of u-boot/master
> - enable the H200 and UHS support in the defconfigs of the DRA7 platforms
> 
> Changes in v3:
> - in omap_hsmmc_set_clock(), if mmc->clock is zero, use the max divider.
> - prefer the usage of the BIT() macro over the construct ( 1 << x )
> - fixed build issue with omap3 platforms

Applied to u-boot-mmc. Sorry for late.

Best Regards,
Jaehoon Chung

> 
> Jean-Jacques Hiblot (13):
>   mmc: omap_hsmmc: cleanup clock configuration
>   mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
>   mmc: omap_hsmmc: Add tuning support
>   mmc: omap_hsmmc: Workaround for errata id i802
>   mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>   mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
>   mmc: omap_hsmmc: update mmc->clock with the actual bus speed
>   mmc: omap_hsmmc: implement send_init_stream callback
>   mmc: omap_hsmmc: add signal voltage selection support
>   ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes
>   dts: am57xx-beagle-x15: disable UHS and HS200 support
>   dts: am57xx-idk: disable HS200 support
>   configs: dra7xx_evm/dra7xx_hs_evm: Enable MMC HS200 and SD UHS support
> 
> Kishon Vijay Abraham I (11):
>   mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
>   mmc: omap_hsmmc: add support to set default io voltage
>   mmc: omap_hsmmc: Enable DDR mode support
>   mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
>   ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
>   mmc: omap_hsmmc: Add support to set IODELAY values
>   mmc: omap_hsmmc: Add support to get pinctrl values and max frequency
>     for different hw revisions
>   mmc: omap_hsmmc: allow mmc clock to be gated
>   ARM: OMAP5: set mmc clock frequency to 192MHz
>   ARM: dts: DRA7: use new dra7-specific compatible string
>   ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1
> 
>  arch/arm/dts/am57xx-beagle-x15.dts               |   6 +
>  arch/arm/dts/am57xx-idk-common.dtsi              |   2 +
>  arch/arm/dts/dra7.dtsi                           |  22 +-
>  arch/arm/include/asm/arch-omap5/clock.h          |   2 +-
>  arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h |   3 +
>  arch/arm/include/asm/arch-omap5/sys_proto.h      |   7 +
>  arch/arm/include/asm/omap_mmc.h                  |  59 +-
>  arch/arm/mach-omap2/omap5/dra7xx_iodelay.c       |  30 +
>  arch/arm/mach-omap2/omap5/hw_data.c              |  10 +-
>  board/ti/am57xx/board.c                          |  30 +
>  board/ti/dra7xx/evm.c                            |  29 +
>  configs/dra7xx_evm_defconfig                     |   3 +
>  configs/dra7xx_hs_evm_defconfig                  |   3 +
>  drivers/mmc/omap_hsmmc.c                         | 952 +++++++++++++++++++++--
>  include/configs/am57xx_evm.h                     |   2 -
>  include/configs/dra7xx_evm.h                     |   2 -
>  16 files changed, 1087 insertions(+), 75 deletions(-)
>
Jean-Jacques Hiblot Feb. 19, 2018, 5:22 p.m. UTC | #2
On 19/02/2018 12:23, Jaehoon Chung wrote:
> Hi JJ,
>
> On 01/31/2018 12:01 AM, Jean-Jacques Hiblot wrote:
>> This series adds the missing bits to enable the UHS and HS200 modes
>> for the TI platforms.
>>
>> Enabling support for high speed modes on omap5 requires implementing:
>>   * io signal voltage selection
>>   * tuning support
>>   * pin configuration (IO delays)
>>
>> The few last patches enable the high speed modes for the DRA7 platforms and
>> also take care of disabling those modes in the dts for the platforms that
>> cannot support either the UHS or the HS200 because the voltage regulators
>> on board would not allow using those modes (not a SOC limitation).
>>
>> With this in place we observe significant improvements in the performances:
>> on a DRA72 evm:
>> eMMC HS200: 124 MB/s
>> eMMC DDR52: 78 MB/s
>> sd   SDR104: 71 MB/s
>> sd   SDR50: 44 MB/s
>> For the record, the original performances were:
>> SD High speed: 18 MB/s
>> MMC High speed: 18 MB/s
>>
>> This series has been tested on:
>> * DRA71-evm
>> * DRA72-evm
>> * DRA7x-evm
>> * DRA76-evm
>> * AM57x-evm
>> * Beaglebone Black (dt and non-dt)
>>
>> Changes in v2:
>> - rebased on top of u-boot/master
>> - enable the H200 and UHS support in the defconfigs of the DRA7 platforms
>>
>> Changes in v3:
>> - in omap_hsmmc_set_clock(), if mmc->clock is zero, use the max divider.
>> - prefer the usage of the BIT() macro over the construct ( 1 << x )
>> - fixed build issue with omap3 platforms
> Applied to u-boot-mmc. Sorry for late.
>
> Best Regards,
> Jaehoon Chung
Thanks Jaehoon
>> Jean-Jacques Hiblot (13):
>>    mmc: omap_hsmmc: cleanup clock configuration
>>    mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
>>    mmc: omap_hsmmc: Add tuning support
>>    mmc: omap_hsmmc: Workaround for errata id i802
>>    mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>>    mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
>>    mmc: omap_hsmmc: update mmc->clock with the actual bus speed
>>    mmc: omap_hsmmc: implement send_init_stream callback
>>    mmc: omap_hsmmc: add signal voltage selection support
>>    ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes
>>    dts: am57xx-beagle-x15: disable UHS and HS200 support
>>    dts: am57xx-idk: disable HS200 support
>>    configs: dra7xx_evm/dra7xx_hs_evm: Enable MMC HS200 and SD UHS support
>>
>> Kishon Vijay Abraham I (11):
>>    mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
>>    mmc: omap_hsmmc: add support to set default io voltage
>>    mmc: omap_hsmmc: Enable DDR mode support
>>    mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
>>    ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
>>    mmc: omap_hsmmc: Add support to set IODELAY values
>>    mmc: omap_hsmmc: Add support to get pinctrl values and max frequency
>>      for different hw revisions
>>    mmc: omap_hsmmc: allow mmc clock to be gated
>>    ARM: OMAP5: set mmc clock frequency to 192MHz
>>    ARM: dts: DRA7: use new dra7-specific compatible string
>>    ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1
>>
>>   arch/arm/dts/am57xx-beagle-x15.dts               |   6 +
>>   arch/arm/dts/am57xx-idk-common.dtsi              |   2 +
>>   arch/arm/dts/dra7.dtsi                           |  22 +-
>>   arch/arm/include/asm/arch-omap5/clock.h          |   2 +-
>>   arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h |   3 +
>>   arch/arm/include/asm/arch-omap5/sys_proto.h      |   7 +
>>   arch/arm/include/asm/omap_mmc.h                  |  59 +-
>>   arch/arm/mach-omap2/omap5/dra7xx_iodelay.c       |  30 +
>>   arch/arm/mach-omap2/omap5/hw_data.c              |  10 +-
>>   board/ti/am57xx/board.c                          |  30 +
>>   board/ti/dra7xx/evm.c                            |  29 +
>>   configs/dra7xx_evm_defconfig                     |   3 +
>>   configs/dra7xx_hs_evm_defconfig                  |   3 +
>>   drivers/mmc/omap_hsmmc.c                         | 952 +++++++++++++++++++++--
>>   include/configs/am57xx_evm.h                     |   2 -
>>   include/configs/dra7xx_evm.h                     |   2 -
>>   16 files changed, 1087 insertions(+), 75 deletions(-)
>>
>