Message ID | 20211015041053.2769193-61-richard.henderson@linaro.org |
---|---|
State | New |
Headers | show |
Series | user-only: Cleanup SIGSEGV and SIGBUS handling | expand |
On Thu, Oct 14, 2021 at 10:14 PM Richard Henderson < richard.henderson@linaro.org> wrote: > To be called from tcg generated code on hosts that support > unaligned accesses natively, in response to an access that > is supposed to be aligned. > > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > include/tcg/tcg-ldst.h | 5 +++++ > accel/tcg/user-exec.c | 11 +++++++++++ > 2 files changed, 16 insertions(+) > Reviewed-by: Warner Losh <imp@bsdimp.com> > diff --git a/include/tcg/tcg-ldst.h b/include/tcg/tcg-ldst.h > index 8c86365611..bf40942de4 100644 > --- a/include/tcg/tcg-ldst.h > +++ b/include/tcg/tcg-ldst.h > @@ -70,5 +70,10 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong > addr, uint32_t val, > void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, > MemOpIdx oi, uintptr_t retaddr); > > +#else > + > +void QEMU_NORETURN helper_unaligned_ld(CPUArchState *env, target_ulong > addr); > +void QEMU_NORETURN helper_unaligned_st(CPUArchState *env, target_ulong > addr); > + > #endif /* CONFIG_SOFTMMU */ > #endif /* TCG_LDST_H */ > diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c > index 7d50dd54f6..0473ead5ab 100644 > --- a/accel/tcg/user-exec.c > +++ b/accel/tcg/user-exec.c > @@ -27,6 +27,7 @@ > #include "exec/helper-proto.h" > #include "qemu/atomic128.h" > #include "trace/trace-root.h" > +#include "tcg/tcg-ldst.h" > #include "internal.h" > > __thread uintptr_t helper_retaddr; > @@ -217,6 +218,16 @@ static void validate_memop(MemOpIdx oi, MemOp > expected) > #endif > } > > +void helper_unaligned_ld(CPUArchState *env, target_ulong addr) > +{ > + cpu_loop_exit_sigbus(env_cpu(env), addr, MMU_DATA_LOAD, GETPC()); > +} > + > +void helper_unaligned_st(CPUArchState *env, target_ulong addr) > +{ > + cpu_loop_exit_sigbus(env_cpu(env), addr, MMU_DATA_STORE, GETPC()); > +} > + > static void *cpu_mmu_lookup(CPUArchState *env, target_ulong addr, > MemOpIdx oi, uintptr_t ra, MMUAccessType type) > { > -- > 2.25.1 > >
On 10/15/21 06:10, Richard Henderson wrote: > To be called from tcg generated code on hosts that support > unaligned accesses natively, in response to an access that > is supposed to be aligned. > > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > include/tcg/tcg-ldst.h | 5 +++++ > accel/tcg/user-exec.c | 11 +++++++++++ > 2 files changed, 16 insertions(+) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
diff --git a/include/tcg/tcg-ldst.h b/include/tcg/tcg-ldst.h index 8c86365611..bf40942de4 100644 --- a/include/tcg/tcg-ldst.h +++ b/include/tcg/tcg-ldst.h @@ -70,5 +70,10 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, MemOpIdx oi, uintptr_t retaddr); +#else + +void QEMU_NORETURN helper_unaligned_ld(CPUArchState *env, target_ulong addr); +void QEMU_NORETURN helper_unaligned_st(CPUArchState *env, target_ulong addr); + #endif /* CONFIG_SOFTMMU */ #endif /* TCG_LDST_H */ diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 7d50dd54f6..0473ead5ab 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -27,6 +27,7 @@ #include "exec/helper-proto.h" #include "qemu/atomic128.h" #include "trace/trace-root.h" +#include "tcg/tcg-ldst.h" #include "internal.h" __thread uintptr_t helper_retaddr; @@ -217,6 +218,16 @@ static void validate_memop(MemOpIdx oi, MemOp expected) #endif } +void helper_unaligned_ld(CPUArchState *env, target_ulong addr) +{ + cpu_loop_exit_sigbus(env_cpu(env), addr, MMU_DATA_LOAD, GETPC()); +} + +void helper_unaligned_st(CPUArchState *env, target_ulong addr) +{ + cpu_loop_exit_sigbus(env_cpu(env), addr, MMU_DATA_STORE, GETPC()); +} + static void *cpu_mmu_lookup(CPUArchState *env, target_ulong addr, MemOpIdx oi, uintptr_t ra, MMUAccessType type) {