| Message ID | 20211015041053.2769193-2-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | user-only: Cleanup SIGSEGV and SIGBUS handling | expand |
On Thu, Oct 14, 2021 at 10:10 PM Richard Henderson < richard.henderson@linaro.org> wrote: > Split out a function to adjust the raw signal pc into a > value that could be passed to cpu_restore_state. > > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > v2: Adjust pc in place; return MMUAccessType. > --- > include/exec/exec-all.h | 10 ++++++++++ > accel/tcg/user-exec.c | 41 +++++++++++++++++++++++++---------------- > 2 files changed, 35 insertions(+), 16 deletions(-) > Reviewed-by: Warner Losh <imp@bsdimp.com> > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index 9d5987ba04..e54f8e5d65 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -663,6 +663,16 @@ static inline tb_page_addr_t > get_page_addr_code_hostp(CPUArchState *env, > return addr; > } > > +/** > + * adjust_signal_pc: > + * @pc: raw pc from the host signal ucontext_t. > + * @is_write: host memory operation was write, or read-modify-write. > + * > + * Alter @pc as required for unwinding. Return the type of the > + * guest memory access -- host reads may be for guest execution. > + */ > +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); > + > /** > * cpu_signal_handler > * @signum: host signal number > diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c > index e6bb29b42d..c02d509ec6 100644 > --- a/accel/tcg/user-exec.c > +++ b/accel/tcg/user-exec.c > @@ -57,18 +57,11 @@ static void QEMU_NORETURN > cpu_exit_tb_from_sighandler(CPUState *cpu, > cpu_loop_exit_noexc(cpu); > } > > -/* 'pc' is the host PC at which the exception was raised. 'address' is > - the effective address of the memory exception. 'is_write' is 1 if a > - write caused the exception and otherwise 0'. 'old_set' is the > - signal set which should be restored */ > -static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, > - int is_write, sigset_t *old_set) > +/* > + * Adjust the pc to pass to cpu_restore_state; return the memop type. > + */ > +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) > { > - CPUState *cpu = current_cpu; > - CPUClass *cc; > - unsigned long address = (unsigned long)info->si_addr; > - MMUAccessType access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; > - > switch (helper_retaddr) { > default: > /* > @@ -77,7 +70,7 @@ static inline int handle_cpu_signal(uintptr_t pc, > siginfo_t *info, > * pointer into the generated code that will unwind to the > * correct guest pc. > */ > - pc = helper_retaddr; > + *pc = helper_retaddr; > break; > > case 0: > @@ -97,7 +90,7 @@ static inline int handle_cpu_signal(uintptr_t pc, > siginfo_t *info, > * Therefore, adjust to compensate for what will be done later > * by cpu_restore_state_from_tb. > */ > - pc += GETPC_ADJ; > + *pc += GETPC_ADJ; > break; > > case 1: > @@ -113,12 +106,28 @@ static inline int handle_cpu_signal(uintptr_t pc, > siginfo_t *info, > * > * Like tb_gen_code, release the memory lock before cpu_loop_exit. > */ > - pc = 0; > - access_type = MMU_INST_FETCH; > mmap_unlock(); > - break; > + *pc = 0; > + return MMU_INST_FETCH; > } > > + return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; > +} > + > +/* > + * 'pc' is the host PC at which the exception was raised. > + * 'address' is the effective address of the memory exception. > + * 'is_write' is 1 if a write caused the exception and otherwise 0. > + * 'old_set' is the signal set which should be restored. > + */ > +static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, > + int is_write, sigset_t *old_set) > +{ > + CPUState *cpu = current_cpu; > + CPUClass *cc; > + unsigned long address = (unsigned long)info->si_addr; > + MMUAccessType access_type = adjust_signal_pc(&pc, is_write); > + > /* For synchronous signals we expect to be coming from the vCPU > * thread (so current_cpu should be valid) and either from running > * code or during translation which can fault as we cross pages. > -- > 2.25.1 > >
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 9d5987ba04..e54f8e5d65 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -663,6 +663,16 @@ static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, return addr; } +/** + * adjust_signal_pc: + * @pc: raw pc from the host signal ucontext_t. + * @is_write: host memory operation was write, or read-modify-write. + * + * Alter @pc as required for unwinding. Return the type of the + * guest memory access -- host reads may be for guest execution. + */ +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); + /** * cpu_signal_handler * @signum: host signal number diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index e6bb29b42d..c02d509ec6 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -57,18 +57,11 @@ static void QEMU_NORETURN cpu_exit_tb_from_sighandler(CPUState *cpu, cpu_loop_exit_noexc(cpu); } -/* 'pc' is the host PC at which the exception was raised. 'address' is - the effective address of the memory exception. 'is_write' is 1 if a - write caused the exception and otherwise 0'. 'old_set' is the - signal set which should be restored */ -static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, - int is_write, sigset_t *old_set) +/* + * Adjust the pc to pass to cpu_restore_state; return the memop type. + */ +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) { - CPUState *cpu = current_cpu; - CPUClass *cc; - unsigned long address = (unsigned long)info->si_addr; - MMUAccessType access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; - switch (helper_retaddr) { default: /* @@ -77,7 +70,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * pointer into the generated code that will unwind to the * correct guest pc. */ - pc = helper_retaddr; + *pc = helper_retaddr; break; case 0: @@ -97,7 +90,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * Therefore, adjust to compensate for what will be done later * by cpu_restore_state_from_tb. */ - pc += GETPC_ADJ; + *pc += GETPC_ADJ; break; case 1: @@ -113,12 +106,28 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * * Like tb_gen_code, release the memory lock before cpu_loop_exit. */ - pc = 0; - access_type = MMU_INST_FETCH; mmap_unlock(); - break; + *pc = 0; + return MMU_INST_FETCH; } + return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; +} + +/* + * 'pc' is the host PC at which the exception was raised. + * 'address' is the effective address of the memory exception. + * 'is_write' is 1 if a write caused the exception and otherwise 0. + * 'old_set' is the signal set which should be restored. + */ +static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, + int is_write, sigset_t *old_set) +{ + CPUState *cpu = current_cpu; + CPUClass *cc; + unsigned long address = (unsigned long)info->si_addr; + MMUAccessType access_type = adjust_signal_pc(&pc, is_write); + /* For synchronous signals we expect to be coming from the vCPU * thread (so current_cpu should be valid) and either from running * code or during translation which can fault as we cross pages.