diff mbox series

[v2,08/13] target/riscv: Replace is_32bit with get_xl/get_xlen

Message ID 20211013205104.1031679-9-richard.henderson@linaro.org
State New
Headers show
Series target/riscv: Rationalize XLEN and operand length | expand

Commit Message

Richard Henderson Oct. 13, 2021, 8:50 p.m. UTC
In preparation for RV128, replace a simple predicate
with a more versatile test.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/riscv/translate.c | 32 +++++++++++++++++---------------
 1 file changed, 17 insertions(+), 15 deletions(-)

Comments

LIU Zhiwei Oct. 14, 2021, 8:26 a.m. UTC | #1
On 2021/10/14 上午4:50, Richard Henderson wrote:
> In preparation for RV128, replace a simple predicate
> with a more versatile test.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei<zhiwei_liu@c-sky.com>

Zhiwei
> ---
>   target/riscv/translate.c | 32 +++++++++++++++++---------------
>   1 file changed, 17 insertions(+), 15 deletions(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 7e7bb67d15..5724a62bb0 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -91,16 +91,18 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)
>   }
>   
>   #ifdef TARGET_RISCV32
> -# define is_32bit(ctx)  true
> +#define get_xl(ctx)    MXL_RV32
>   #elif defined(CONFIG_USER_ONLY)
> -# define is_32bit(ctx)  false
> +#define get_xl(ctx)    MXL_RV64
>   #else
> -static inline bool is_32bit(DisasContext *ctx)
> -{
> -    return ctx->xl == MXL_RV32;
> -}
> +#define get_xl(ctx)    ((ctx)->xl)
>   #endif
>   
> +static inline int get_xlen(DisasContext *ctx)
> +{
> +    return 16 << get_xl(ctx);
> +}
> +
>   /* The word size for this operation. */
>   static inline int oper_len(DisasContext *ctx)
>   {
> @@ -282,7 +284,7 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
>   static void mark_fs_dirty(DisasContext *ctx)
>   {
>       TCGv tmp;
> -    target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
> +    target_ulong sd = get_xl(ctx) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD;
>   
>       if (ctx->mstatus_fs != MSTATUS_FS) {
>           /* Remember the state change for the rest of the TB. */
> @@ -341,16 +343,16 @@ EX_SH(12)
>       }                              \
>   } while (0)
>   
> -#define REQUIRE_32BIT(ctx) do { \
> -    if (!is_32bit(ctx)) {       \
> -        return false;           \
> -    }                           \
> +#define REQUIRE_32BIT(ctx) do {    \
> +    if (get_xl(ctx) != MXL_RV32) { \
> +        return false;              \
> +    }                              \
>   } while (0)
>   
> -#define REQUIRE_64BIT(ctx) do { \
> -    if (is_32bit(ctx)) {        \
> -        return false;           \
> -    }                           \
> +#define REQUIRE_64BIT(ctx) do {    \
> +    if (get_xl(ctx) < MXL_RV64) {  \
> +        return false;              \
> +    }                              \
>   } while (0)
>   
>   static int ex_rvc_register(DisasContext *ctx, int reg)
Alistair Francis Oct. 15, 2021, 5:11 a.m. UTC | #2
On Thu, Oct 14, 2021 at 6:59 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> In preparation for RV128, replace a simple predicate
> with a more versatile test.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/translate.c | 32 +++++++++++++++++---------------
>  1 file changed, 17 insertions(+), 15 deletions(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 7e7bb67d15..5724a62bb0 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -91,16 +91,18 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)
>  }
>
>  #ifdef TARGET_RISCV32
> -# define is_32bit(ctx)  true
> +#define get_xl(ctx)    MXL_RV32
>  #elif defined(CONFIG_USER_ONLY)
> -# define is_32bit(ctx)  false
> +#define get_xl(ctx)    MXL_RV64
>  #else
> -static inline bool is_32bit(DisasContext *ctx)
> -{
> -    return ctx->xl == MXL_RV32;
> -}
> +#define get_xl(ctx)    ((ctx)->xl)
>  #endif
>
> +static inline int get_xlen(DisasContext *ctx)
> +{
> +    return 16 << get_xl(ctx);
> +}
> +
>  /* The word size for this operation. */
>  static inline int oper_len(DisasContext *ctx)
>  {
> @@ -282,7 +284,7 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
>  static void mark_fs_dirty(DisasContext *ctx)
>  {
>      TCGv tmp;
> -    target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
> +    target_ulong sd = get_xl(ctx) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD;
>
>      if (ctx->mstatus_fs != MSTATUS_FS) {
>          /* Remember the state change for the rest of the TB. */
> @@ -341,16 +343,16 @@ EX_SH(12)
>      }                              \
>  } while (0)
>
> -#define REQUIRE_32BIT(ctx) do { \
> -    if (!is_32bit(ctx)) {       \
> -        return false;           \
> -    }                           \
> +#define REQUIRE_32BIT(ctx) do {    \
> +    if (get_xl(ctx) != MXL_RV32) { \
> +        return false;              \
> +    }                              \
>  } while (0)
>
> -#define REQUIRE_64BIT(ctx) do { \
> -    if (is_32bit(ctx)) {        \
> -        return false;           \
> -    }                           \
> +#define REQUIRE_64BIT(ctx) do {    \
> +    if (get_xl(ctx) < MXL_RV64) {  \
> +        return false;              \
> +    }                              \
>  } while (0)
>
>  static int ex_rvc_register(DisasContext *ctx, int reg)
> --
> 2.25.1
>
>
diff mbox series

Patch

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 7e7bb67d15..5724a62bb0 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -91,16 +91,18 @@  static inline bool has_ext(DisasContext *ctx, uint32_t ext)
 }
 
 #ifdef TARGET_RISCV32
-# define is_32bit(ctx)  true
+#define get_xl(ctx)    MXL_RV32
 #elif defined(CONFIG_USER_ONLY)
-# define is_32bit(ctx)  false
+#define get_xl(ctx)    MXL_RV64
 #else
-static inline bool is_32bit(DisasContext *ctx)
-{
-    return ctx->xl == MXL_RV32;
-}
+#define get_xl(ctx)    ((ctx)->xl)
 #endif
 
+static inline int get_xlen(DisasContext *ctx)
+{
+    return 16 << get_xl(ctx);
+}
+
 /* The word size for this operation. */
 static inline int oper_len(DisasContext *ctx)
 {
@@ -282,7 +284,7 @@  static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
 static void mark_fs_dirty(DisasContext *ctx)
 {
     TCGv tmp;
-    target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
+    target_ulong sd = get_xl(ctx) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD;
 
     if (ctx->mstatus_fs != MSTATUS_FS) {
         /* Remember the state change for the rest of the TB. */
@@ -341,16 +343,16 @@  EX_SH(12)
     }                              \
 } while (0)
 
-#define REQUIRE_32BIT(ctx) do { \
-    if (!is_32bit(ctx)) {       \
-        return false;           \
-    }                           \
+#define REQUIRE_32BIT(ctx) do {    \
+    if (get_xl(ctx) != MXL_RV32) { \
+        return false;              \
+    }                              \
 } while (0)
 
-#define REQUIRE_64BIT(ctx) do { \
-    if (is_32bit(ctx)) {        \
-        return false;           \
-    }                           \
+#define REQUIRE_64BIT(ctx) do {    \
+    if (get_xl(ctx) < MXL_RV64) {  \
+        return false;              \
+    }                              \
 } while (0)
 
 static int ex_rvc_register(DisasContext *ctx, int reg)