@@ -252,9 +252,8 @@ static void start_cycle_count_session(CPUPPCState *env)
}
}
-static void cpu_ppc_pmu_timer_cb(void *opaque)
+static void fire_PMC_interrupt(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
if (!(env->spr[SPR_POWER_MMCR0] & MMCR0_EBE)) {
@@ -284,6 +283,13 @@ static void cpu_ppc_pmu_timer_cb(void *opaque)
ppc_set_irq(cpu, PPC_INTERRUPT_PMC, 1);
}
+static void cpu_ppc_pmu_timer_cb(void *opaque)
+{
+ PowerPCCPU *cpu = opaque;
+
+ fire_PMC_interrupt(cpu);
+}
+
void cpu_ppc_pmu_timer_init(CPUPPCState *env)
{
PowerPCCPU *cpu = env_archcpu(env);
@@ -377,6 +383,8 @@ static bool pmc_counting_insns(CPUPPCState *env, int sprn,
/* This helper assumes that the PMC is running. */
void helper_insns_inc(CPUPPCState *env, uint32_t num_insns)
{
+ bool overflow_triggered = false;
+ PowerPCCPU *cpu;
int sprn;
for (sprn = SPR_POWER_PMC1; sprn <= SPR_POWER_PMC5; sprn++) {
@@ -390,8 +398,19 @@ void helper_insns_inc(CPUPPCState *env, uint32_t num_insns)
} else {
env->spr[sprn] += num_insns;
}
+
+ if (env->spr[sprn] >= COUNTER_NEGATIVE_VAL &&
+ pmc_counter_negative_enabled(env, sprn)) {
+ overflow_triggered = true;
+ env->spr[sprn] = COUNTER_NEGATIVE_VAL;
+ }
}
}
+
+ if (overflow_triggered) {
+ cpu = env_archcpu(env);
+ fire_PMC_interrupt(cpu);
+ }
}
#endif /* defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) */
@@ -4437,6 +4437,14 @@ static void pmu_count_insns(DisasContext *ctx)
tcg_gen_andi_tl(t0, t0, MMCR0_FC);
tcg_gen_brcond_tl(TCG_COND_EQ, t0, t_mmcr0FC, l_exit);
+ /*
+ * The PMU insns_inc() helper stops the internal PMU timer if a
+ * counter overflows happens. In that case, if the guest is
+ * running with icount and we do not handle it beforehand,
+ * the helper can trigger a 'bad icount read'.
+ */
+ gen_icount_io_start(ctx);
+
gen_helper_insns_inc(cpu_env, tcg_constant_i32(ctx->base.num_insns));
gen_set_label(l_exit);
Enabling counter negative overflow for the PMCs that are counting instructions is simpler than when counting cycles. Instruction counting is done via helper_insns_inc(), which is called every time a TB ends. Firing a performance monitor alert due to a counter negative overflow in this case is a matter of checking if the counter value is over 0x80000000 each time the counters are incremented and, if counter negative events are enabled for that specific counter, trigger the PM alert. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> --- target/ppc/power8_pmu.c | 23 +++++++++++++++++++++-- target/ppc/translate.c | 8 ++++++++ 2 files changed, 29 insertions(+), 2 deletions(-)