| Message ID | 20201120210844.2625602-27-f4bug@amsat.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/mips: Explode 60% of the 32K-lines translate.c | expand |
On Fri, Nov 20, 2020 at 10:08:44PM +0100, Philippe Mathieu-Daudé wrote: > Add an entry for the TCG core related to Toshiba TXx9. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > Adding Fredrik Noring in case he wants to be notified of changes, > patch conditional to his approval. I may be able to help on the TX79 that is an R5900, but unless commit 823f2897bdd7 ("target/mips: Disable R5900 support") is reverted, it remains shut off in QEMU. To obtain n32, in addition to o32, one may want to apply something similar to this: diff --git a/linux-user/mips64/target_elf.h b/linux-user/mips64/target_elf.h index ec55d8542a..5f2f2df29f 100644 --- a/linux-user/mips64/target_elf.h +++ b/linux-user/mips64/target_elf.h @@ -12,6 +12,9 @@ static inline const char *cpu_get_model(uint32_t eflags) if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_64R6) { return "I6400"; } + if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) { + return "R5900"; + } return "5KEf"; } #endif > --- > MAINTAINERS | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index b6d98b95c47..d97f0f1d66e 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -253,6 +253,12 @@ R: Craig Janeczek <jancraig@amazon.com> > S: Odd Fixes > F: target/mips/vendor-xburst* > > +MIPS TCG CPUs (Toshiba TX) > +M: Philippe Mathieu-Daudé <f4bug@amsat.org> > +R: Fredrik Noring <noring@nocrew.org> > +S: Odd Fixes > +F: target/mips/vendor-tx* > + > MIPS TCG CPUs (nanoMIPS ISA) > S: Orphan > F: disas/nanomips.* > -- > 2.26.2 > Fredrik
Hi Fredrik, On 12/12/20 5:04 PM, Fredrik Noring wrote: > On Fri, Nov 20, 2020 at 10:08:44PM +0100, Philippe Mathieu-Daudé wrote: >> Add an entry for the TCG core related to Toshiba TXx9. >> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> >> --- >> Adding Fredrik Noring in case he wants to be notified of changes, >> patch conditional to his approval. > > I may be able to help on the TX79 that is an R5900, but unless commit > 823f2897bdd7 ("target/mips: Disable R5900 support") is reverted, it > remains shut off in QEMU. To obtain n32, in addition to o32, one may > want to apply something similar to this: I added o32 because these are the only binaries I could find to test the CPU you added. Are there n32 binaries easily available? I noticed GCC merged your patch, and Gentoo too. It should be enough to respin the Docker image to cross-compile and test the TCG tests you already added: 8e2e5e7daca tests/tcg: mips: Test R5900 three-operand MADDU 84dc0712361 tests/tcg: mips: Test R5900 three-operand MADD1 50f299da629 tests/tcg: mips: Test R5900 three-operand MADD 35eb9be6bb6 tests/tcg/mips: Add tests for R5900 DIVU1 990aa328be4 tests/tcg/mips: Add tests for R5900 DIV1 4d261a6a595 tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1 3303f017adb tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1 bec4d66b248 tests/tcg/mips: Add tests for R5900 three-operand MULTU1 cb56125eea7 tests/tcg/mips: Add tests for R5900 three-operand MULT1 667eded2702 tests/tcg/mips: Add tests for R5900 three-operand MULTU > > diff --git a/linux-user/mips64/target_elf.h b/linux-user/mips64/target_elf.h > index ec55d8542a..5f2f2df29f 100644 > --- a/linux-user/mips64/target_elf.h > +++ b/linux-user/mips64/target_elf.h > @@ -12,6 +12,9 @@ static inline const char *cpu_get_model(uint32_t eflags) > if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_64R6) { > return "I6400"; > } > + if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) { > + return "R5900"; > + } > return "5KEf"; > } > #endif > >> --- >> MAINTAINERS | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index b6d98b95c47..d97f0f1d66e 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -253,6 +253,12 @@ R: Craig Janeczek <jancraig@amazon.com> >> S: Odd Fixes >> F: target/mips/vendor-xburst* >> >> +MIPS TCG CPUs (Toshiba TX) >> +M: Philippe Mathieu-Daudé <f4bug@amsat.org> >> +R: Fredrik Noring <noring@nocrew.org> >> +S: Odd Fixes >> +F: target/mips/vendor-tx* BTW I should also include here: F: tests/tcg/mips/user/isa/r5900/ Regards, Phil.
On Sun, Dec 13, 2020 at 04:23:23PM +0100, Philippe Mathieu-Daudé wrote: > On 12/12/20 5:04 PM, Fredrik Noring wrote: > > I may be able to help on the TX79 that is an R5900, but unless commit > > 823f2897bdd7 ("target/mips: Disable R5900 support") is reverted, it > > remains shut off in QEMU. To obtain n32, in addition to o32, one may > > want to apply something similar to this: > > I added o32 because these are the only binaries I could find to test > the CPU you added. Are there n32 binaries easily available? With a GNU C library patch: Yes. The only (small) changes needed for n32 are related to Glibc, since the R5900 does not implement DMULT etc. in hardware. The attached patch (see below) traps these instructions, but the Glibc patch proposal (not yet submitted) will instead emulate them, which is believed to be faster (with actual hardware; with QEMU it would most likely instead be significantly slower since QEMU would need to emulate this emulation). quoted from https://lists.gnu.org/archive/html/qemu-devel/2019-01/msg00974.html having this GNU C library patch for n32 attached. > I noticed GCC merged your patch, Yes, GCC emits R5900 o32. > and Gentoo too. I suppose you mean https://github.com/frno7/gentoo.overlay/tree/master/app-emulation/qemu-mipsr5900el that is my QEMU overlay (having this patch in the "files" directory) for Gentoo? > It should be enough to respin the Docker image to cross-compile and test > the TCG tests you already added: Sounds good, although I'm not familiar with Docker myself. A person named TobiX has also made an image for R5900 cross-compilation: https://github.com/frno7/linux/issues/33#issuecomment-632284209 > 8e2e5e7daca tests/tcg: mips: Test R5900 three-operand MADDU > 84dc0712361 tests/tcg: mips: Test R5900 three-operand MADD1 > 50f299da629 tests/tcg: mips: Test R5900 three-operand MADD > 35eb9be6bb6 tests/tcg/mips: Add tests for R5900 DIVU1 > 990aa328be4 tests/tcg/mips: Add tests for R5900 DIV1 > 4d261a6a595 tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1 > 3303f017adb tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1 > bec4d66b248 tests/tcg/mips: Add tests for R5900 three-operand MULTU1 > cb56125eea7 tests/tcg/mips: Add tests for R5900 three-operand MULT1 > 667eded2702 tests/tcg/mips: Add tests for R5900 three-operand MULTU There are tests for the MMIs PCPYUD, PCPYLD, LQ and SQ as well https://lists.gnu.org/archive/html/qemu-devel/2019-01/msg02514.html https://lists.gnu.org/archive/html/qemu-devel/2019-01/msg02516.html https://lists.gnu.org/archive/html/qemu-devel/2019-01/msg02517.html although, as previously suggested, I'm happy to postpone the MMIs. Fredrik
On Sun, Dec 13, 2020 at 04:23:23PM +0100, Philippe Mathieu-Daudé wrote: > I noticed GCC merged your patch, By the way, the fairly new -mfix-r5900 option (implied with mipsr5900el) is required for the R5900 hardware short loop erratum[1]. I've made a simple tool to scan ELF objects for problems[2], as it can be tedious to find and analyse everything manually. QEMU doesn't emulate this bug, though. Code built for the R5900 and most other MIPS implementations were previously mutually exclusive, but can nowadays be generic.[3] > and Gentoo too. Did you proceed with your RFC patches "docker: Add gentoo-mipsr5900el-cross image"[4]? There are two new guides on how to build an R5900 cross-compiler on the R5900 Linux wiki: with Gentoo[5] and from sources[6]. Any GNU C library (or any other) patches for n32 etc. can easily be applied onto the standard Gentoo packages, if you want to.[7][8] Fredrik References: [1] https://github.com/frno7/linux/wiki/R5900-short-loop-erratum [2] https://github.com/frno7/linux/tree/ps2-v5.4/tools/r5900check [3] https://lists.nongnu.org/archive/html/qemu-devel/2018-11/msg03661.html [4] https://lists.nongnu.org/archive/html/qemu-devel/2018-11/msg03511.html [5] https://github.com/frno7/linux/wiki/Building-an-R5900-cross-compiler-using-Gentoo-Linux [6] https://github.com/frno7/linux/wiki/Building-an-R5900-cross-compiler-from-sources [7] https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg03944.html [8] https://wiki.gentoo.org/wiki//etc/portage/patches
diff --git a/MAINTAINERS b/MAINTAINERS index b6d98b95c47..d97f0f1d66e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -253,6 +253,12 @@ R: Craig Janeczek <jancraig@amazon.com> S: Odd Fixes F: target/mips/vendor-xburst* +MIPS TCG CPUs (Toshiba TX) +M: Philippe Mathieu-Daudé <f4bug@amsat.org> +R: Fredrik Noring <noring@nocrew.org> +S: Odd Fixes +F: target/mips/vendor-tx* + MIPS TCG CPUs (nanoMIPS ISA) S: Orphan F: disas/nanomips.*
Add an entry for the TCG core related to Toshiba TXx9. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- Adding Fredrik Noring in case he wants to be notified of changes, patch conditional to his approval. --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+)