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[83.42.66.234]) by smtp.gmail.com with ESMTPSA id z6sm5685798wmi.1.2020.11.20.13.11.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Nov 2020 13:11:03 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 26/26] MAINTAINERS: Add entry for MIPS Toshiba TCG Date: Fri, 20 Nov 2020 22:08:44 +0100 Message-Id: <20201120210844.2625602-27-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201120210844.2625602-1-f4bug@amsat.org> References: <20201120210844.2625602-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x441.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fredrik Noring , Craig Janeczek , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Laurent Vivier , Paolo Bonzini , Huacai Chen , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add an entry for the TCG core related to Toshiba TXx9. Signed-off-by: Philippe Mathieu-Daudé --- Adding Fredrik Noring in case he wants to be notified of changes, patch conditional to his approval. --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b6d98b95c47..d97f0f1d66e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -253,6 +253,12 @@ R: Craig Janeczek S: Odd Fixes F: target/mips/vendor-xburst* +MIPS TCG CPUs (Toshiba TX) +M: Philippe Mathieu-Daudé +R: Fredrik Noring +S: Odd Fixes +F: target/mips/vendor-tx* + MIPS TCG CPUs (nanoMIPS ISA) S: Orphan F: disas/nanomips.*