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[v1,37/41] s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION

Message ID 20190411100836.646-38-david@redhat.com
State New
Headers show
Series s390x/tcg: Vector Instruction Support Part 2 | expand

Commit Message

David Hildenbrand April 11, 2019, 10:08 a.m. UTC
Reuse s390_vec_sub() to perform two 128-bit subtraction, calculating the
borrow.

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/helper.h           |  1 +
 target/s390x/insn-data.def      |  2 ++
 target/s390x/translate_vx.inc.c | 13 +++++++++++++
 target/s390x/vec_int_helper.c   | 16 ++++++++++++++++
 4 files changed, 32 insertions(+)

Comments

Richard Henderson April 13, 2019, 6:11 a.m. UTC | #1
On 4/11/19 12:08 AM, David Hildenbrand wrote:
> +static DisasJumpType op_vsbcbi(DisasContext *s, DisasOps *o)
> +{
> +    if (get_field(s->fields, m5) != ES_128) {
> +        gen_program_exception(s, PGM_SPECIFICATION);
> +        return DISAS_NORETURN;
> +    }
> +
> +    gen_gvec_4_ool(get_field(s->fields, v1), get_field(s->fields, v2),
> +                   get_field(s->fields, v3), get_field(s->fields, v4), 0,
> +                   gen_helper_gvec_vsbcbi128);
> +    return DISAS_NEXT;
> +}


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

I'm sure this can be done similarly to add with carry compute carry, but it's
harder to reason with sub2.  Something like

	tcg_gen_andi_i64(tl, cl, 1);
	tcg_gen_sub2_i64(tl, th, al, zero, tl, zero);
	tcg_gen_sub2_i64(tl, th, tl, th, bl, zero);
	tcg_gen_andi_i64(tl, th, 1);
	tcg_gen_sub2_i64(tl, th, ah, zero, tl, zero);
	tcg_gen_sub2_i64(tl, th, tl, th, bh, zero);
	tcg_gen_andi_i64(tl, th, 1);
	/* result in tl */


r~
David Hildenbrand April 16, 2019, 6:26 p.m. UTC | #2
On 13.04.19 08:11, Richard Henderson wrote:
> On 4/11/19 12:08 AM, David Hildenbrand wrote:
>> +static DisasJumpType op_vsbcbi(DisasContext *s, DisasOps *o)
>> +{
>> +    if (get_field(s->fields, m5) != ES_128) {
>> +        gen_program_exception(s, PGM_SPECIFICATION);
>> +        return DISAS_NORETURN;
>> +    }
>> +
>> +    gen_gvec_4_ool(get_field(s->fields, v1), get_field(s->fields, v2),
>> +                   get_field(s->fields, v3), get_field(s->fields, v4), 0,
>> +                   gen_helper_gvec_vsbcbi128);
>> +    return DISAS_NEXT;
>> +}
> 
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> I'm sure this can be done similarly to add with carry compute carry, but it's
> harder to reason with sub2.  Something like
> 
> 	tcg_gen_andi_i64(tl, cl, 1);
> 	tcg_gen_sub2_i64(tl, th, al, zero, tl, zero);
> 	tcg_gen_sub2_i64(tl, th, tl, th, bl, zero);
> 	tcg_gen_andi_i64(tl, th, 1);
> 	tcg_gen_sub2_i64(tl, th, ah, zero, tl, zero);
> 	tcg_gen_sub2_i64(tl, th, tl, th, bh, zero);
> 	tcg_gen_andi_i64(tl, th, 1);
> 	/* result in tl */

Indeed, looks good to me. The only thing to care about is to convert -1
to 1, so we get a proper borrow.

Thanks!
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Patch

diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 33e3e003f8..d040e4cd07 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -233,6 +233,7 @@  DEF_HELPER_FLAGS_4(gvec_vsrl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32)
 DEF_HELPER_FLAGS_4(gvec_vscbi8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
 DEF_HELPER_FLAGS_4(gvec_vscbi16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
 DEF_HELPER_FLAGS_4(gvec_vscbi128, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vsbcbi128, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
 
 #ifndef CONFIG_USER_ONLY
 DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index a60d8531dc..a8d90517f6 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1180,6 +1180,8 @@ 
     F(0xe7f5, VSCBI,   VRR_c, V,   0, 0, 0, 0, vscbi, 0, IF_VEC)
 /* VECTOR SUBTRACT WITH BORROW INDICATION */
     F(0xe7bf, VSBI,    VRR_d, V,   0, 0, 0, 0, vsbi, 0, IF_VEC)
+/* VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION */
+    F(0xe7bd, VSBCBI,  VRR_d, V,   0, 0, 0, 0, vsbcbi, 0, IF_VEC)
 
 #ifndef CONFIG_USER_ONLY
 /* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 3f60b97654..fd232ba6c3 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -2212,3 +2212,16 @@  static DisasJumpType op_vsbi(DisasContext *s, DisasOps *o)
                       get_field(s->fields, v4));
     return DISAS_NEXT;
 }
+
+static DisasJumpType op_vsbcbi(DisasContext *s, DisasOps *o)
+{
+    if (get_field(s->fields, m5) != ES_128) {
+        gen_program_exception(s, PGM_SPECIFICATION);
+        return DISAS_NORETURN;
+    }
+
+    gen_gvec_4_ool(get_field(s->fields, v1), get_field(s->fields, v2),
+                   get_field(s->fields, v3), get_field(s->fields, v4), 0,
+                   gen_helper_gvec_vsbcbi128);
+    return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.c
index 699b399a26..95686e79fd 100644
--- a/target/s390x/vec_int_helper.c
+++ b/target/s390x/vec_int_helper.c
@@ -803,3 +803,19 @@  void HELPER(gvec_vscbi128)(void *v1, const void *v2, const void *v3,
     dst->doubleword[0] = 0;
     dst->doubleword[1] = s390_vec_sub(&tmp, v2, v3);
 }
+
+void HELPER(gvec_vsbcbi128)(void *v1, const void *v2, const void *v3,
+                            const void *v4, uint32_t desc)
+{
+    const S390Vector old_borrow = {
+        .doubleword[0] = 0,
+        .doubleword[1] = ((S390Vector *)v4)->doubleword[1] & 1,
+    };
+    S390Vector tmp, *dst = v1;
+    bool borrow;
+
+    borrow = s390_vec_sub(&tmp, v2, v3);
+    borrow |= s390_vec_sub(&tmp, &tmp, &old_borrow);
+    dst->doubleword[0] = 0;
+    dst->doubleword[1] = borrow;
+}