| Message ID | 20190411100836.646-32-david@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | s390x/tcg: Vector Instruction Support Part 2 | expand |
On 4/11/19 12:08 AM, David Hildenbrand wrote: > +static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) > +{ > + int src_idx = get_field(s->fields, i4) & 0xf; > + > + if (src_idx == 0) { > + gen_gvec_mov(get_field(s->fields, v1), get_field(s->fields, v2)); > + } else { > + gen_gvec_3_ool(get_field(s->fields, v1), get_field(s->fields, v2), > + get_field(s->fields, v3), src_idx, > + gen_helper_gvec_vsldb); > + return DISAS_NEXT; You could also expand this inline using your new extract2 primitive. int i4 = get_field(s->fields, i4); int left_shift, right_shift; left_shift = (i4 & 7) * 8; right_shift = 64 - left_shift; if ((i4 & 8) == 0) { read_vec_element_i64(t0, get_field(s->fields, v2), 0, ES_64); read_vec_element_i64(t1, get_field(s->fields, v2), 1, ES_64); read_vec_element_i64(t2, get_field(s->fields, v3), 0, ES_64); } else { read_vec_element_i64(t0, get_field(s->fields, v2), 1, ES_64); read_vec_element_i64(t1, get_field(s->fields, v3), 0, ES_64); read_vec_element_i64(t2, get_field(s->fields, v3), 1, ES_64); } tcg_gen_extract2_i64(t0, t1, t0, right_shift); tcg_gen_extract2_i64(t1, t2, t1, right_shift); write_vec_element_i64(t0, get_field(s->fields, v1), 0, ES_64); write_vec_element_i64(t1, get_field(s->fields, v1), 1, ES_64); r~
On 13.04.19 02:54, Richard Henderson wrote: > On 4/11/19 12:08 AM, David Hildenbrand wrote: >> +static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) >> +{ >> + int src_idx = get_field(s->fields, i4) & 0xf; >> + >> + if (src_idx == 0) { >> + gen_gvec_mov(get_field(s->fields, v1), get_field(s->fields, v2)); >> + } else { >> + gen_gvec_3_ool(get_field(s->fields, v1), get_field(s->fields, v2), >> + get_field(s->fields, v3), src_idx, >> + gen_helper_gvec_vsldb); >> + return DISAS_NEXT; > > You could also expand this inline using your new extract2 primitive. > > int i4 = get_field(s->fields, i4); > int left_shift, right_shift; > > left_shift = (i4 & 7) * 8; > right_shift = 64 - left_shift; > > if ((i4 & 8) == 0) { > read_vec_element_i64(t0, get_field(s->fields, v2), 0, ES_64); > read_vec_element_i64(t1, get_field(s->fields, v2), 1, ES_64); > read_vec_element_i64(t2, get_field(s->fields, v3), 0, ES_64); > } else { > read_vec_element_i64(t0, get_field(s->fields, v2), 1, ES_64); > read_vec_element_i64(t1, get_field(s->fields, v3), 0, ES_64); > read_vec_element_i64(t2, get_field(s->fields, v3), 1, ES_64); > } > tcg_gen_extract2_i64(t0, t1, t0, right_shift); > tcg_gen_extract2_i64(t1, t2, t1, right_shift); Trying to understand the magic, left_shift is really only used to to calculate right_shift, right? > write_vec_element_i64(t0, get_field(s->fields, v1), 0, ES_64); > write_vec_element_i64(t1, get_field(s->fields, v1), 1, ES_64); > > > r~ >
On 4/15/19 11:45 PM, David Hildenbrand wrote: > On 13.04.19 02:54, Richard Henderson wrote: >> On 4/11/19 12:08 AM, David Hildenbrand wrote: >>> +static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) >>> +{ >>> + int src_idx = get_field(s->fields, i4) & 0xf; >>> + >>> + if (src_idx == 0) { >>> + gen_gvec_mov(get_field(s->fields, v1), get_field(s->fields, v2)); >>> + } else { >>> + gen_gvec_3_ool(get_field(s->fields, v1), get_field(s->fields, v2), >>> + get_field(s->fields, v3), src_idx, >>> + gen_helper_gvec_vsldb); >>> + return DISAS_NEXT; >> >> You could also expand this inline using your new extract2 primitive. >> >> int i4 = get_field(s->fields, i4); >> int left_shift, right_shift; >> >> left_shift = (i4 & 7) * 8; >> right_shift = 64 - left_shift; >> >> if ((i4 & 8) == 0) { >> read_vec_element_i64(t0, get_field(s->fields, v2), 0, ES_64); >> read_vec_element_i64(t1, get_field(s->fields, v2), 1, ES_64); >> read_vec_element_i64(t2, get_field(s->fields, v3), 0, ES_64); >> } else { >> read_vec_element_i64(t0, get_field(s->fields, v2), 1, ES_64); >> read_vec_element_i64(t1, get_field(s->fields, v3), 0, ES_64); >> read_vec_element_i64(t2, get_field(s->fields, v3), 1, ES_64); >> } >> tcg_gen_extract2_i64(t0, t1, t0, right_shift); >> tcg_gen_extract2_i64(t1, t2, t1, right_shift); > > Trying to understand the magic, left_shift is really only used to to > calculate right_shift, right? Yes. I thought that was clearer as a separate step. r~
diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 67037f6de6..a433f57009 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -227,6 +227,7 @@ DEF_HELPER_FLAGS_4(gvec_vesra16, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_vesrl8, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_vesrl16, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_vsldb, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 2621e433cd..76aec5a21f 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1164,6 +1164,8 @@ F(0xe774, VSL, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) /* VECTOR SHIFT LEFT BY BYTE */ F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) +/* VECTOR SHIFT LEFT DOUBLE BY BYTE */ + F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index c08710fd45..221b729ee0 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -2089,3 +2089,18 @@ static DisasJumpType op_vsl(DisasContext *s, DisasOps *o) tcg_temp_free_i64(shift); return DISAS_NEXT; } + +static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) +{ + int src_idx = get_field(s->fields, i4) & 0xf; + + if (src_idx == 0) { + gen_gvec_mov(get_field(s->fields, v1), get_field(s->fields, v2)); + } else { + gen_gvec_3_ool(get_field(s->fields, v1), get_field(s->fields, v2), + get_field(s->fields, v3), src_idx, + gen_helper_gvec_vsldb); + return DISAS_NEXT; + } + return DISAS_NEXT; +} diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.c index b1a3a25f9f..8b922e717f 100644 --- a/target/s390x/vec_int_helper.c +++ b/target/s390x/vec_int_helper.c @@ -43,6 +43,13 @@ static bool s390_vec_is_zero(const S390Vector *v) return !v->doubleword[0] && !v->doubleword[1]; } +static void s390_vec_or(S390Vector *res, const S390Vector *a, + const S390Vector *b) +{ + res->doubleword[0] = a->doubleword[0] | b->doubleword[0]; + res->doubleword[1] = a->doubleword[1] | b->doubleword[1]; +} + static void s390_vec_xor(S390Vector *res, const S390Vector *a, const S390Vector *b) { @@ -704,3 +711,16 @@ void HELPER(gvec_vsl)(void *v1, const void *v2, uint64_t count, { s390_vec_shl(v1, v2, count); } + +void HELPER(gvec_vsldb)(void *v1, const void *v2, const void *v3, + uint32_t desc) +{ + const uint8_t src_idx = simd_data(desc); + S390Vector t0; + S390Vector t1; + + g_assert(src_idx > 0 && src_idx < 16); + s390_vec_shl(&t0, v2, src_idx * 8); + s390_vec_shr(&t1, v3, 128 - src_idx * 8); + s390_vec_or(v1, &t0, &t1); +}
Implement it via an ool helper. reusing the existing shift helpers. In case the starting index is 0, it is basically a copy of v2 to v1. Signed-off-by: David Hildenbrand <david@redhat.com> --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 15 +++++++++++++++ target/s390x/vec_int_helper.c | 20 ++++++++++++++++++++ 4 files changed, 38 insertions(+)