Message ID | 20240402102951.3099078-2-peter.maydell@linaro.org |
---|---|
State | New |
Headers | show |
Series | [PULL,1/5] target/arm: take HSTR traps of cp15 accesses to EL2, not EL1 | expand |
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index c8a24706750..69585e6003d 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -4585,7 +4585,7 @@ static void do_coproc_insn(DisasContext *s, int cpnum, int is64, tcg_gen_andi_i32(t, t, 1u << maskbit); tcg_gen_brcondi_i32(TCG_COND_EQ, t, 0, over.label); - gen_exception_insn(s, 0, EXCP_UDEF, syndrome); + gen_exception_insn_el(s, 0, EXCP_UDEF, syndrome, 2); /* * gen_exception_insn() will set is_jmp to DISAS_NORETURN, * but since we're conditionally branching over it, we want