Show patches with: Archived = No       |   431061 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[PULL,04/21] target/i386: Moved int_ctl into CPUX86State structure [PULL,01/21] target/i386: add missing bits to CR4_RESERVED_MASK - - - - --- 2021-09-13 Paolo Bonzini New
[PULL,03/21] target/i386: Added VGIF feature [PULL,01/21] target/i386: add missing bits to CR4_RESERVED_MASK - - - - --- 2021-09-13 Paolo Bonzini New
[PULL,02/21] target/i386: VMRUN and VMLOAD canonicalizations [PULL,01/21] target/i386: add missing bits to CR4_RESERVED_MASK - - - - --- 2021-09-13 Paolo Bonzini New
[PULL,01/21] target/i386: add missing bits to CR4_RESERVED_MASK [PULL,01/21] target/i386: add missing bits to CR4_RESERVED_MASK - 1 - 1 --- 2021-09-13 Paolo Bonzini New
[PULL,00/21] x86, docs, meson changes for 2021-09-13 - - - - --- 2021-09-13 Paolo Bonzini New
gitlab-ci: Make more custom runner jobs manual, and don't allow failure gitlab-ci: Make more custom runner jobs manual, and don't allow failure 1 - 1 - --- 2021-09-13 Peter Maydell New
[v2,12/12] target/arm: Optimize MVE 1op-immediate insns target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,11/12] target/arm: Optimize MVE VSLI and VSRI target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,10/12] target/arm: Optimize MVE VSHLL and VMOVL target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,09/12] target/arm: Optimize MVE VSHL, VSHR immediate forms target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,08/12] target/arm: Optimize MVE VMVN target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,07/12] target/arm: Optimize MVE VDUP target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,06/12] target/arm: Optimize MVE VNEG, VABS target/arm: Use TCG vector ops for MVE - - 2 - --- 2021-09-13 Peter Maydell New
[v2,05/12] target/arm: Optimize MVE arithmetic ops target/arm: Use TCG vector ops for MVE - - 2 - --- 2021-09-13 Peter Maydell New
[v2,04/12] target/arm: Optimize MVE logic ops target/arm: Use TCG vector ops for MVE - - 2 - --- 2021-09-13 Peter Maydell New
[v2,03/12] target/arm: Add TB flag for "MVE insns not predicated" target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,02/12] target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[v2,01/12] target/arm: Avoid goto_tb if we're trying to exit to the main loop target/arm: Use TCG vector ops for MVE - - 1 - --- 2021-09-13 Peter Maydell New
[PULL,5/5] qapi: Fix bogus error for 'if': { 'not': '' } [PULL,1/5] qapi: Fix a botched type annotation - - 1 - --- 2021-09-13 Markus Armbruster New
[PULL,4/5] tests/qapi-schema: Cover 'not' condition with empty argument [PULL,1/5] qapi: Fix a botched type annotation - - 1 - --- 2021-09-13 Markus Armbruster New
[PULL,3/5] qapi: Bury some unused code in class Indentation [PULL,1/5] qapi: Fix a botched type annotation - - 1 - --- 2021-09-13 Markus Armbruster New
[PULL,2/5] qapi: Drop Indentation.__bool__() [PULL,1/5] qapi: Fix a botched type annotation - - 1 - --- 2021-09-13 Markus Armbruster New
[PULL,1/5] qapi: Fix a botched type annotation [PULL,1/5] qapi: Fix a botched type annotation - - 1 - --- 2021-09-13 Markus Armbruster New
[PULL,0/5] QAPI patches patches for 2021-09-13 - - - - --- 2021-09-13 Markus Armbruster New
[qemu-web,v2] Update the information about the required version of macOS [qemu-web,v2] Update the information about the required version of macOS - - - - --- 2021-09-13 Thomas Huth New
[v9,11/11] hvf: arm: Adhere to SMCCC 1.3 section 5.2 hvf: Implement Apple Silicon Support - - - - --- 2021-09-12 Alexander Graf New
[v9,10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2 hvf: Implement Apple Silicon Support - - - - --- 2021-09-12 Alexander Graf New
[v9,09/11] hvf: arm: Add rudimentary PMC support hvf: Implement Apple Silicon Support - - - - --- 2021-09-12 Alexander Graf New
[v9,08/11] arm: Add Hypervisor.framework build target hvf: Implement Apple Silicon Support - - 3 1 --- 2021-09-12 Alexander Graf New
[v9,07/11] hvf: arm: Implement PSCI handling hvf: Implement Apple Silicon Support - - 1 - --- 2021-09-12 Alexander Graf New
[v9,06/11] hvf: arm: Implement -cpu host hvf: Implement Apple Silicon Support 1 - 1 - --- 2021-09-12 Alexander Graf New
[v9,05/11] arm/hvf: Add a WFI handler hvf: Implement Apple Silicon Support 1 - 1 - --- 2021-09-12 Alexander Graf New
[v9,04/11] hvf: Add Apple Silicon support hvf: Implement Apple Silicon Support - - 2 - --- 2021-09-12 Alexander Graf New
[v9,03/11] hvf: Introduce hvf_arch_init() callback hvf: Implement Apple Silicon Support - - - - --- 2021-09-12 Alexander Graf New
[v9,02/11] hvf: Add execute to dirty log permission bitmap hvf: Implement Apple Silicon Support - - - - --- 2021-09-12 Alexander Graf New
[v9,01/11] arm: Move PMC register definitions to cpu.h hvf: Implement Apple Silicon Support - - - - --- 2021-09-12 Alexander Graf New
[v2,1/2] qemu-binfmt-conf.sh: fix -F option [v2,1/2] qemu-binfmt-conf.sh: fix -F option - - - - --- 2021-09-12 Martin Wilck New
[RFC,v5] virtio/vsock: add two more queues for datagram types [RFC,v5] virtio/vsock: add two more queues for datagram types - - - - --- 2021-09-12 Jiang Wang New
tcg/arm: Reduce vector alignment requirement for NEON tcg/arm: Reduce vector alignment requirement for NEON - - - - --- 2021-09-12 Richard Henderson New
[v4,30/30] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one accel: Move has_work() from SysemuCPUOps to AccelOpsClass 1 - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,29/30] target/xtensa: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,28/30] target/tricore: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,27/30] target/sparc: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,26/30] target/sparc: Remove pointless use of CONFIG_TCG definition accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,25/30] target/sh4: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,24/30] target/s390x: Restrict has_work() handler to sysemu and TCG accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,23/30] target/rx: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,22/30] target/riscv: Restrict has_work() handler to sysemu and TCG accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,21/30] target/ppc: Restrict has_work() handlers to sysemu and TCG accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,20/30] target/ppc: Introduce PowerPCCPUClass::has_work() accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,19/30] target/openrisc: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,18/30] target/nios2: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,17/30] target/mips: Restrict has_work() handler to sysemu and TCG accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,16/30] target/microblaze: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,15/30] target/m68k: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,14/30] target/i386: Restrict has_work() handler to sysemu and TCG accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,13/30] target/hppa: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,12/30] target/hexagon: Remove unused has_work() handler accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,11/30] target/cris: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,10/30] target/avr: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,09/30] target/arm: Restrict has_work() handler to sysemu and TCG accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,08/30] target/alpha: Restrict has_work() handler to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,07/30] accel/tcg: Implement AccelOpsClass::has_work() as stub accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,06/30] accel/whpx: Implement AccelOpsClass::has_work() accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,05/30] accel/kvm: Implement AccelOpsClass::has_work() accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,04/30] sysemu: Introduce AccelOpsClass::has_work() accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,03/30] hw/core: Un-inline cpu_has_work() accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,02/30] hw/core: Restrict cpu_has_work() to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[v4,01/30] accel/tcg: Restrict cpu_handle_halt() to sysemu accel: Move has_work() from SysemuCPUOps to AccelOpsClass - - 1 - --- 2021-09-12 Philippe Mathieu-Daudé New
[2/2] vhost-user: remove VirtQ notifier restore Improve vhost-user VQ notifier unmap - 1 - - --- 2021-09-12 Xueming(Steven) Li New
[1/2] vhost-user: fix VirtQ notifier cleanup Improve vhost-user VQ notifier unmap - 1 - - --- 2021-09-12 Xueming(Steven) Li New
[PULL,9/9] tcg/arm: Fix tcg_out_vec_op function signature [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - 1 - --- 2021-09-12 Richard Henderson New
[PULL,8/9] tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELF [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - - - --- 2021-09-12 Richard Henderson New
[PULL,7/9] tcg/ppc: Replace TCG_TARGET_CALL_DARWIN with _CALL_DARWIN [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - - - --- 2021-09-12 Richard Henderson New
[PULL,6/9] include/qemu: Use builtins for bswap [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - 1 - --- 2021-09-12 Richard Henderson New
[PULL,5/9] tcg: Remove tcg_global_reg_new defines [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - 1 - --- 2021-09-12 Richard Henderson New
[PULL,4/9] accel/tcg: remove redundant TCG_KICK_PERIOD define [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - 2 - --- 2021-09-12 Richard Henderson New
[PULL,3/9] tcg/i386: Split P_VEXW from P_REXW [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - 1 - - --- 2021-09-12 Richard Henderson New
[PULL,2/9] accel/tcg: Clear PAGE_WRITE before translation [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - - - --- 2021-09-12 Richard Henderson New
[PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* [PULL,1/9] accel/tcg: Add DisasContextBase argument to translator_ld* - - - - --- 2021-09-12 Richard Henderson New
[PULL,0/9] tcg patch queue - - - - --- 2021-09-12 Richard Henderson New
[RESEND,v2,4/4] hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-12 Frank Chang New
[RESEND,v2,3/4] hw/dma: sifive_pdma: allow non-multiple transaction size transactions hw/dma: Align SiFive PDMA behavior with real hardware - - 2 2 --- 2021-09-12 Frank Chang New
[RESEND,v2,2/4] hw/dma: sifive_pdma: claim bit must be set before DMA transactions hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-12 Frank Chang New
[RESEND,v2,1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-12 Frank Chang New
[3/3] ui/console: remove chardev frontend connected test ui/console: chardev backend improvements - - 1 - --- 2021-09-12 Volker Rümelin New
[2/3] ui/console: replace kbd_timer with chr_accept_input callback ui/console: chardev backend improvements - - 1 - --- 2021-09-12 Volker Rümelin New
[1/3] ui/console: replace QEMUFIFO with Fifo8 ui/console: chardev backend improvements - - - - --- 2021-09-12 Volker Rümelin New
qapi: define cleanup function for g_autoptr(Error) qapi: define cleanup function for g_autoptr(Error) - - 1 - --- 2021-09-12 Paolo Bonzini New
docs: link to archived Fedora code of conduct docs: link to archived Fedora code of conduct - - 1 - --- 2021-09-12 Paolo Bonzini New
[v2,4/4] hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-12 Frank Chang New
[v2,3/4] hw/dma: sifive_pdma: allow non-multiple transaction size transactions hw/dma: Align SiFive PDMA behavior with real hardware - - 2 2 --- 2021-09-12 Frank Chang New
[v2,2/4] hw/dma: sifive_pdma: claim bit must be set before DMA transactions hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-12 Frank Chang New
[v2,1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-12 Frank Chang New
[20/20] q800: configure nubus available slots for Quadra 800 nubus: bus, device, bridge, IRQ and address space improvements - - - - --- 2021-09-12 Mark Cave-Ayland New
[19/20] q800: wire up nubus IRQs nubus: bus, device, bridge, IRQ and address space improvements - - - - --- 2021-09-12 Mark Cave-Ayland New
[18/20] nubus: add support for slot IRQs nubus: bus, device, bridge, IRQ and address space improvements - - - - --- 2021-09-12 Mark Cave-Ayland New
[17/20] nubus-bridge: make slot_available_mask a qdev property nubus: bus, device, bridge, IRQ and address space improvements - - - - --- 2021-09-12 Mark Cave-Ayland New
[16/20] nubus-bridge: embed the NubusBus object directly within nubus-bridge nubus: bus, device, bridge, IRQ and address space improvements - - 1 - --- 2021-09-12 Mark Cave-Ayland New
[15/20] nubus: move NubusBus from mac-nubus-bridge to nubus-bridge nubus: bus, device, bridge, IRQ and address space improvements - - 1 - --- 2021-09-12 Mark Cave-Ayland New
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