Show patches with: Submitter = Frank Chang       |    State = Action Required       |    Archived = No       |   562 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v7,75/75] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,74/75] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us() support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,73/75] target/riscv: rvv-1.0: add vsetivli instruction support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,72/75] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11 support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,71/75] target/riscv: set mstatus.SD bit when writing fp CSRs support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,70/75] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,69/75] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,68/75] target/riscv: gdb: support vector registers for rv64 & rv32 support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,67/75] target/riscv: rvv-1.0: set mstatus.SD bit when writing vector CSRs support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,66/75] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,65/75] target/riscv: rvv-1.0: implement vstart CSR support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,64/75] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,63/75] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,62/75] target/riscv: add "set round to odd" rounding mode helper function support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,61/75] target/riscv: rvv-1.0: widening floating-point/integer type-convert support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,60/75] target/riscv: rvv-1.0: floating-point/integer type-convert instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,59/75] target/riscv: introduce floating-point rounding mode enum support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,58/75] target/riscv: rvv-1.0: floating-point min/max instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,57/75] target/riscv: rvv-1.0: remove integer extract instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,56/75] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,55/75] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,54/75] target/riscv: rvv-1.0: single-width scaling shift instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,53/75] target/riscv: rvv-1.0: widening floating-point reduction instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,52/75] target/riscv: rvv-1.0: single-width floating-point reduction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,51/75] target/riscv: rvv-1.0: narrowing fixed-point clip instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,50/75] target/riscv: rvv-1.0: floating-point slide instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,49/75] target/riscv: rvv-1.0: slide instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,48/75] target/riscv: rvv-1.0: mask-register logical instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,47/75] target/riscv: rvv-1.0: floating-point compare instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,46/75] target/riscv: rvv-1.0: integer comparison instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,45/75] target/riscv: rvv-1.0: single-width saturating add and subtract instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,44/75] target/riscv: rvv-1.0: widening integer multiply-add instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,43/75] target/riscv: rvv-1.0: narrowing integer right shift instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,42/75] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,41/75] target/riscv: rvv-1.0: single-width bit shift instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,40/75] target/riscv: rvv-1.0: single-width averaging add and subtract instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,39/75] target/riscv: rvv-1.0: integer extension instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,38/75] target/riscv: rvv-1.0: whole register move instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,37/75] target/riscv: rvv-1.0: floating-point scalar move instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,36/75] target/riscv: rvv-1.0: floating-point move instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,35/75] target/riscv: rvv-1.0: integer scalar move instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,34/75] target/riscv: rvv-1.0: register gather instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,33/75] target/riscv: rvv-1.0: allow load element with sign-extended support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,32/75] target/riscv: rvv-1.0: element index instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,31/75] target/riscv: rvv-1.0: iota instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,30/75] target/riscv: rvv-1.0: set-X-first mask bit instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,29/75] target/riscv: rvv-1.0: find-first-set mask bit instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,28/75] target/riscv: rvv-1.0: mask population count instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,27/75] target/riscv: rvv-1.0: floating-point classify instructions support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,26/75] target/riscv: rvv-1.0: floating-point square-root instruction support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,25/75] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,24/75] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,23/75] target/riscv: rvv-1.0: load/store whole register instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,22/75] target/riscv: rvv-1.0: amo operations support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,21/75] target/riscv: rvv-1.0: fault-only-first unit stride load support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,20/75] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,19/75] target/riscv: rvv-1.0: index load and store instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,18/75] target/riscv: rvv-1.0: stride load and store instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,17/75] target/riscv: rvv-1.0: configure instructions support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,16/75] target/riscv: rvv:1.0: add translation-time nan-box helper function support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,15/75] target/riscv: introduce more imm value modes in translator functions support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,14/75] target/riscv: rvv-1.0: update check functions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,13/75] target/riscv: rvv-1.0: add VMA and VTA support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,12/75] target/riscv: rvv-1.0: add fractional LMUL support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,11/75] target/riscv: rvv-1.0: remove MLEN calculations support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,10/75] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,09/75] target/riscv: rvv-1.0: add vlenb register support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,08/75] target/riscv: rvv-1.0: add vcsr register support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,07/75] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,06/75] target/riscv: rvv-1.0: add translation-time vector context status support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,05/75] target/riscv: rvv-1.0: introduce writable misa.v field support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,04/75] target/riscv: rvv-1.0: add sstatus VS field support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,03/75] target/riscv: rvv-1.0: add mstatus VS field support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,02/75] target/riscv: Use FIELD_EX32() to extract wd field support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,01/75] target/riscv: drop vector 0.7.1 and add 1.0 support support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v2] target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh [v2] target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh - - 1 - --- 2021-02-23 Frank Chang New
target/riscv: fix vs() to return proper error code target/riscv: fix vs() to return proper error code - - 1 - --- 2021-02-23 Frank Chang New
target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh - - - - --- 2021-02-19 Frank Chang New
[RFC,v4,16/16] target/riscv: rvb: support and turn on B-extension from command line support subsets of bitmanip extension - - 2 - --- 2021-01-13 Frank Chang New
[RFC,v4,15/16] target/riscv: rvb: add/shift with prefix zero-extend support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,14/16] target/riscv: rvb: address calculation support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,13/16] target/riscv: rvb: generalized or-combine support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,12/16] target/riscv: rvb: generalized reverse support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,11/16] target/riscv: rvb: rotate (left/right) support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,10/16] target/riscv: rvb: shift ones support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,09/16] target/riscv: rvb: single-bit instructions support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,08/16] target/riscv: add gen_shifti() and gen_shiftiw() helper functions support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,07/16] target/riscv: rvb: sign-extend instructions support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,06/16] target/riscv: rvb: min/max instructions support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,05/16] target/riscv: rvb: pack two words into one register support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,04/16] target/riscv: rvb: logic-with-negate support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,03/16] target/riscv: rvb: count bits set support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,02/16] target/riscv: rvb: count leading/trailing zeros support subsets of bitmanip extension - - 1 - --- 2021-01-13 Frank Chang New
[RFC,v4,01/16] target/riscv: reformat @sh format encoding for B-extension support subsets of bitmanip extension - - 2 - --- 2021-01-13 Frank Chang New
[v6,72/72] target/riscv: set mstatus.SD bit when writing fp CSRs support vector extension v1.0 - - - - --- 2021-01-12 Frank Chang New
[v6,71/72] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction support vector extension v1.0 - - - - --- 2021-01-12 Frank Chang New
[v6,70/72] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction support vector extension v1.0 - - - - --- 2021-01-12 Frank Chang New
[v6,69/72] target/riscv: gdb: support vector registers for rv64 & rv32 support vector extension v1.0 - - - - --- 2021-01-12 Frank Chang New
[v6,68/72] target/riscv: gdb: modify gdb csr xml file to align with csr register map support vector extension v1.0 1 - - - --- 2021-01-12 Frank Chang New
[v6,67/72] target/riscv: rvv-1.0: set mstatus.SD bit when writing vector CSRs support vector extension v1.0 - - 1 - --- 2021-01-12 Frank Chang New
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