Show patches with: Series = [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding       |    State = Action Required       |    Archived = No       |   36 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[PULL,36/36] hw/arm/armv7m: Correct typo in QOM object name [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 2 - --- 2020-12-10 Peter Maydell New
[PULL,35/36] hw/intc/armv7m_nvic: Implement read/write for RAS register block [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,34/36] target/arm: Implement M-profile "minimal RAS implementation" [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,33/36] hw/intc/armv7m_nvic: Fix "return from inactive handler" check [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,32/36] target/arm: Implement CCR_S.TRD behaviour for SG insns [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,31/36] hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bit [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,30/36] target/arm: Implement new v8.1M VLLDM and VLSTM encodings [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,29/36] target/arm: Implement new v8.1M NOCP check for exception return [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,28/36] target/arm: Implement v8.1M REVIDR register [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,27/36] target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failures [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,26/36] target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entry [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,25/36] hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,24/36] target/arm: Implement FPCXT_S fp system register [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,23/36] target/arm: Factor out preserve-fp-state from full_vfp_access_check() [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 2 - --- 2020-12-10 Peter Maydell New
[PULL,22/36] target/arm: Use new FPCR_NZCV_MASK constant [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,21/36] target/arm: Implement M-profile FPSCR_nzcvqc [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,20/36] target/arm: Implement VLDR/VSTR system register [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,19/36] target/arm: Move general-use constant expanders up in translate.c [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,18/36] target/arm: Refactor M-profile VMSR/VMRS handling [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,17/36] target/arm: Enforce M-profile VMRS/VMSR register restrictions [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,16/36] target/arm: Implement CLRM instruction [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,15/36] target/arm: Implement VSCCLRM insn [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,14/36] target/arm: Don't clobber ID_PFR1.Security on M-profile cores [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,13/36] target/arm: Implement v8.1M PXN extension [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,12/36] hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFault [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,11/36] i.MX6ul: Fix bad printf format specifiers [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,10/36] i.MX6: Fix bad printf format specifiers [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,09/36] i.MX31: Fix bad printf format specifiers [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,08/36] i.MX25: Fix bad printf format specifiers [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,07/36] tests/qtest/npcm7xx_rng-test: dump random data on failure [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,06/36] sbsa-ref: allow to use Cortex-A53/57/72 cpus [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 2 - --- 2020-12-10 Peter Maydell New
[PULL,05/36] MAINTAINERS: Add maintainer entry for Xilinx ZynqMP CAN controller [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 2 - --- 2020-12-10 Peter Maydell New
[PULL,04/36] tests/qtest: Introduce tests for Xilinx ZynqMP CAN controller [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 2 - --- 2020-12-10 Peter Maydell New
[PULL,03/36] xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllers [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 2 - --- 2020-12-10 Peter Maydell New
[PULL,02/36] hw/net/can: Introduce Xilinx ZynqMP CAN controller [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding - - 1 - --- 2020-12-10 Peter Maydell New
[PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding [PULL,01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding 1 1 1 - --- 2020-12-10 Peter Maydell New