| Message ID | 20180921161939.822-1-clg@kaod.org |
|---|---|
| Headers | show |
| Series | aspeed: misc fixes and enhancements (SMC) | expand |
On 21 September 2018 at 17:19, Cédric Le Goater <clg@kaod.org> wrote: > Hello, > > This series adds a couple of cleanups and two main features to the > SMC controller of the Aspeed machines : > > - a 'execute-in-place' property to boot directly from a memory region > alias of the FMC flash module using MMIO execution. This is not > activated by default because boot time needs to be improved on > recent firmwares. It also breaks migration compatibility. > > - support for DMA to access the flash modules. Our primary need is > the checksum calculation which is used to evaluate the best clock > settings for reads. I've picked out the easy parts of this series and added them to target-arm.next: > aspeed/timer: fix compile breakage with clang 3.4.2 > hw/arm/aspeed: change the FMC flash model of the AST2500 evb > hw/arm/aspeed: Add an Aspeed machine class > aspeed/smc: fix some alignment issues and left the rest for the moment (I've still got this series on my to-review list). In particular I wanted to get the compile fix into the pullreq I'm doing today. thanks -- PMM
On 25 September 2018 at 13:20, Peter Maydell <peter.maydell@linaro.org> wrote: > On 21 September 2018 at 17:19, Cédric Le Goater <clg@kaod.org> wrote: >> Hello, >> >> This series adds a couple of cleanups and two main features to the >> SMC controller of the Aspeed machines : >> >> - a 'execute-in-place' property to boot directly from a memory region >> alias of the FMC flash module using MMIO execution. This is not >> activated by default because boot time needs to be improved on >> recent firmwares. It also breaks migration compatibility. >> >> - support for DMA to access the flash modules. Our primary need is >> the checksum calculation which is used to evaluate the best clock >> settings for reads. > > I've picked out the easy parts of this series and added > them to target-arm.next: > >> aspeed/timer: fix compile breakage with clang 3.4.2 >> hw/arm/aspeed: change the FMC flash model of the AST2500 evb >> hw/arm/aspeed: Add an Aspeed machine class >> aspeed/smc: fix some alignment issues > > and left the rest for the moment (I've still got this series > on my to-review list). PS: review from people familiar with the SoC would also be helpful. thanks -- PMM
On 9/25/18 2:20 PM, Peter Maydell wrote: > On 21 September 2018 at 17:19, Cédric Le Goater <clg@kaod.org> wrote: >> Hello, >> >> This series adds a couple of cleanups and two main features to the >> SMC controller of the Aspeed machines : >> >> - a 'execute-in-place' property to boot directly from a memory region >> alias of the FMC flash module using MMIO execution. This is not >> activated by default because boot time needs to be improved on >> recent firmwares. It also breaks migration compatibility. >> >> - support for DMA to access the flash modules. Our primary need is >> the checksum calculation which is used to evaluate the best clock >> settings for reads. > > I've picked out the easy parts of this series and added > them to target-arm.next: > >> aspeed/timer: fix compile breakage with clang 3.4.2 >> hw/arm/aspeed: change the FMC flash model of the AST2500 evb >> hw/arm/aspeed: Add an Aspeed machine class >> aspeed/smc: fix some alignment issues > > and left the rest for the moment (I've still got this series > on my to-review list). I will wait for your comments on the DMA part before resending. Thanks, C.
On 25 September 2018 at 15:10, Cédric Le Goater <clg@kaod.org> wrote: > On 9/25/18 2:20 PM, Peter Maydell wrote: >> On 21 September 2018 at 17:19, Cédric Le Goater <clg@kaod.org> wrote: >>> Hello, >>> >>> This series adds a couple of cleanups and two main features to the >>> SMC controller of the Aspeed machines : >>> >>> - a 'execute-in-place' property to boot directly from a memory region >>> alias of the FMC flash module using MMIO execution. This is not >>> activated by default because boot time needs to be improved on >>> recent firmwares. It also breaks migration compatibility. >>> >>> - support for DMA to access the flash modules. Our primary need is >>> the checksum calculation which is used to evaluate the best clock >>> settings for reads. >> >> I've picked out the easy parts of this series and added >> them to target-arm.next: >> >>> aspeed/timer: fix compile breakage with clang 3.4.2 >>> hw/arm/aspeed: change the FMC flash model of the AST2500 evb >>> hw/arm/aspeed: Add an Aspeed machine class >>> aspeed/smc: fix some alignment issues >> >> and left the rest for the moment (I've still got this series >> on my to-review list). > > I will wait for your comments on the DMA part before resending. I've now commented on that patch. I think I'm done with review on this version, unless there's something specific you want more input on ? thanks -- PMM
On 10/2/18 12:57 PM, Peter Maydell wrote: > On 25 September 2018 at 15:10, Cédric Le Goater <clg@kaod.org> wrote: >> On 9/25/18 2:20 PM, Peter Maydell wrote: >>> On 21 September 2018 at 17:19, Cédric Le Goater <clg@kaod.org> wrote: >>>> Hello, >>>> >>>> This series adds a couple of cleanups and two main features to the >>>> SMC controller of the Aspeed machines : >>>> >>>> - a 'execute-in-place' property to boot directly from a memory region >>>> alias of the FMC flash module using MMIO execution. This is not >>>> activated by default because boot time needs to be improved on >>>> recent firmwares. It also breaks migration compatibility. >>>> >>>> - support for DMA to access the flash modules. Our primary need is >>>> the checksum calculation which is used to evaluate the best clock >>>> settings for reads. >>> >>> I've picked out the easy parts of this series and added >>> them to target-arm.next: >>> >>>> aspeed/timer: fix compile breakage with clang 3.4.2 >>>> hw/arm/aspeed: change the FMC flash model of the AST2500 evb >>>> hw/arm/aspeed: Add an Aspeed machine class >>>> aspeed/smc: fix some alignment issues >>> >>> and left the rest for the moment (I've still got this series >>> on my to-review list). >> >> I will wait for your comments on the DMA part before resending. > > I've now commented on that patch. I think I'm done with review on > this version, unless there's something specific you want more > input on ? No, a part from the chicken & egg problem on the RAM memory region may be if you have some idea. I will dig in before re-sending anyhow. Thanks, C.
On 9/25/18 2:30 PM, Peter Maydell wrote: > On 25 September 2018 at 13:20, Peter Maydell <peter.maydell@linaro.org> wrote: >> On 21 September 2018 at 17:19, Cédric Le Goater <clg@kaod.org> wrote: >>> Hello, >>> >>> This series adds a couple of cleanups and two main features to the >>> SMC controller of the Aspeed machines : >>> >>> - a 'execute-in-place' property to boot directly from a memory region >>> alias of the FMC flash module using MMIO execution. This is not >>> activated by default because boot time needs to be improved on >>> recent firmwares. It also breaks migration compatibility. >>> >>> - support for DMA to access the flash modules. Our primary need is >>> the checksum calculation which is used to evaluate the best clock >>> settings for reads. >> >> I've picked out the easy parts of this series and added >> them to target-arm.next: >> >>> aspeed/timer: fix compile breakage with clang 3.4.2 >>> hw/arm/aspeed: change the FMC flash model of the AST2500 evb >>> hw/arm/aspeed: Add an Aspeed machine class >>> aspeed/smc: fix some alignment issues >> >> and left the rest for the moment (I've still got this series >> on my to-review list). > > PS: review from people familiar with the SoC would also be helpful. Joel has reviewed the u-boot patches. May be, he can chime in ? Thanks, C.
Hello, This series adds a couple of cleanups and two main features to the SMC controller of the Aspeed machines : - a 'execute-in-place' property to boot directly from a memory region alias of the FMC flash module using MMIO execution. This is not activated by default because boot time needs to be improved on recent firmwares. It also breaks migration compatibility. - support for DMA to access the flash modules. Our primary need is the checksum calculation which is used to evaluate the best clock settings for reads. Thanks, C. Changes since v1: - fixed #ifdef leading underscore - changed the name of the property from 'mmio-exec' to 'execute-in-place' - improved changelogs - introduced a DMA address space for the SMC controller Cédric Le Goater (11): aspeed/timer: fix compile breakage with clang 3.4.2 hw/arm/aspeed: change the FMC flash model of the AST2500 evb hw/arm/aspeed: Add an Aspeed machine class hw/arm/aspeed: add a 'execute-in-place' property to boot directly from CE0 aspeed/smc: fix some alignment issues aspeed/smc: fix default read value aspeed/smc: add a 'sdram_base' and 'max-ram-size' properties aspeed/smc: add support for DMAs aspeed/smc: add DMA calibration settings aspeed/smc: inject errors in DMA checksum aspeed/smc: Add dummy data register include/hw/arm/aspeed.h | 48 +++++ include/hw/ssi/aspeed_smc.h | 6 + include/hw/timer/aspeed_timer.h | 3 +- hw/arm/aspeed.c | 256 ++++++++++-------------- hw/arm/aspeed_soc.c | 28 ++- hw/ssi/aspeed_smc.c | 341 ++++++++++++++++++++++++++++++-- hw/timer/aspeed_timer.c | 1 - 7 files changed, 509 insertions(+), 174 deletions(-) create mode 100644 include/hw/arm/aspeed.h