@@ -85,6 +85,12 @@ enum arm_type_qualifiers
qualifier_const_void_pointer = 0x802
};
+/* The qualifier allows generation of builtins with no operands. */
+static enum arm_type_qualifiers
+arm_nop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ = { qualifier_void };
+#define NOP_QUALIFIERS (arm_nop_qualifiers)
+
/* The qualifier_internal allows generation of a unary builtin from
a pattern with a third pseudo-operand such as a match_scratch.
T (T). */
@@ -2343,6 +2349,10 @@ constant_arg:
else
switch (argc)
{
+ case 0:
+ pat = GEN_FCN (icode) ();
+ break;
+
case 1:
pat = GEN_FCN (icode) (op[0]);
break;
@@ -8906,6 +8906,76 @@
(set_attr "type" "mov_reg")]
)
+(define_insn "yield"
+ [(unspec_volatile [(const_int 0)] VUNSPEC_YIELD)]
+ ""
+{
+ if (TARGET_ARM)
+ return ".inst\t0xe320f001\t//yield";
+ else if(TARGET_THUMB2)
+ return ".inst\t0xf3af8001\t//yield";
+ else /* TARGET_THUMB1 */
+ return ".inst\t0xbf10\t//yield";
+}
+ [(set_attr "type" "coproc")]
+)
+
+(define_insn "wfe"
+ [(unspec_volatile [(const_int 0)] VUNSPEC_WFE)]
+ ""
+{
+ if (TARGET_ARM)
+ return ".inst\t0xe320f002\t//wfe";
+ else if(TARGET_THUMB2)
+ return ".inst\t0xf3af8002\t//wfe";
+ else /* TARGET_THUMB1 */
+ return ".inst\t0xbf20\t//wfe";
+}
+ [(set_attr "type" "coproc")]
+)
+
+(define_insn "wfi"
+ [(unspec_volatile [(const_int 0)] VUNSPEC_WFI)]
+ ""
+{
+ if (TARGET_ARM)
+ return ".inst\t0xe320f003\t//wfi";
+ else if(TARGET_THUMB2)
+ return ".inst\t0xf3af8003\t//wfi";
+ else /* TARGET_THUMB1 */
+ return ".inst\t0xbf30\t//wfi";
+}
+ [(set_attr "type" "coproc")]
+)
+
+(define_insn "sev"
+ [(unspec_volatile [(const_int 0)] VUNSPEC_SEV)]
+ ""
+{
+ if (TARGET_ARM)
+ return ".inst\t0xe320f004\t//sev";
+ else if(TARGET_THUMB2)
+ return ".inst\t0xf3af8004\t//sev";
+ else /* TARGET_THUMB1 */
+ return ".inst\t0xbf40\t//sev";
+}
+ [(set_attr "type" "coproc")]
+)
+
+(define_insn "sevl"
+ [(unspec_volatile [(const_int 0)] VUNSPEC_SEVL)]
+ ""
+{
+ if (TARGET_ARM)
+ return ".inst\t0xe320f005\t//sevl";
+ else if(TARGET_THUMB2)
+ return ".inst\t0xf3af8005\t//sevl";
+ else /* TARGET_THUMB1 */
+ return ".inst\t0xbf50\t//sevl";
+}
+ [(set_attr "type" "coproc")]
+)
+
(define_insn "trap"
[(trap_if (const_int 1) (const_int 0))]
""
@@ -241,5 +241,39 @@ __crc32cd (uint32_t __a, uint64_t __b)
#ifdef __cplusplus
}
#endif
+__extension__ static __inline void __attribute__ ((__always_inline__))
+__nop (void)
+{
+ __builtin_arm_nop ();
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+__yield (void)
+{
+ __builtin_arm_yield ();
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+__sev (void)
+{
+ __builtin_arm_sev ();
+}
+__extension__ static __inline void __attribute__ ((__always_inline__))
+__sevl (void)
+{
+ __builtin_arm_sevl ();
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+__wfi (void)
+{
+ __builtin_arm_wfi ();
+}
+
+__extension__ static __inline void __attribute__ ((__always_inline__))
+__wfe (void)
+{
+ __builtin_arm_wfe ();
+}
#endif
@@ -42,3 +42,9 @@ VAR1 (MCRR, mcrr, void)
VAR1 (MCRR, mcrr2, void)
VAR1 (MRRC, mrrc, di)
VAR1 (MRRC, mrrc2, di)
+VAR1 (NOP, nop, void)
+VAR1 (NOP, yield, void)
+VAR1 (NOP, wfi, void)
+VAR1 (NOP, wfe, void)
+VAR1 (NOP, sev, void)
+VAR1 (NOP, sevl, void)
@@ -172,6 +172,11 @@
VUNSPEC_MRRC ; Represent the coprocessor mrrc instruction.
VUNSPEC_MRRC2 ; Represent the coprocessor mrrc2 instruction.
VUNSPEC_SPECULATION_BARRIER ; Represents an unconditional speculation barrier.
+ VUNSPEC_YIELD ; Used by the intrinsic form of the YIELD instruction.
+ VUNSPEC_SEV ; Used by the intrinsic form of the SEV instruction.
+ VUNSPEC_SEVL ; Used by the intrinsic form of the SEVL instruction.
+ VUNSPEC_WFI ; Used by the intrinsic form of the WFI instruction.
+ VUNSPEC_WFE ; Used by the intrinsic form of the WFE instruction.
])
;; Enumerators for NEON unspecs.
new file mode 100644
@@ -0,0 +1,13 @@
+/* Test the nop ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-additional-options "-O0" } */
+
+#include "arm_acle.h"
+
+void
+test_hint (void)
+{
+ __nop ();
+}
+
+/* { dg-final {scan-assembler-times "\tnop" 3 } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the sev ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-options "-marm" } */
+
+#include "arm_acle.h"
+
+void
+test_sev (void)
+{
+ __sev ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xe320f004\t\/\/sev" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the sev ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_sev (void)
+{
+ __sev ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xbf40\t\/\/sev" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the sev ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_sev (void)
+{
+ __sev ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xf3af8004\t\/\/sev" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the sevl ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-options "-marm" } */
+
+#include "arm_acle.h"
+
+void
+test_sevl (void)
+{
+ __sevl ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xe320f005\t\/\/sevl" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the sevl ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_sevl (void)
+{
+ __sevl ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xbf50\t\/\/sevl" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the sevl ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_sevl (void)
+{
+ __sevl ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xf3af8005\t\/\/sevl" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the wfe ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-options "-marm" } */
+
+#include "arm_acle.h"
+
+void
+test_wfe (void)
+{
+ __wfe ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xe320f002\t\/\/wfe" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the wfe ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_wfe (void)
+{
+ __wfe ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xbf20\t\/\/wfe" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the wfe ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_wfe (void)
+{
+ __wfe ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xf3af8002\t\/\/wfe" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the wfi ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-options "-marm" } */
+
+#include "arm_acle.h"
+
+void
+test_wfi (void)
+{
+ __wfi ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xe320f003\t\/\/wfi" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the wfi ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_wfi (void)
+{
+ __wfi ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xbf30\t\/\/wfi" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the wfi ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_wfi (void)
+{
+ __wfi ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xf3af8003\t\/\/wfi" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the yield ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-options "-marm" } */
+
+#include "arm_acle.h"
+
+void
+test_yield (void)
+{
+ __yield ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xe320f001\t\/\/yield" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the yield ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_yield (void)
+{
+ __yield ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xbf10\t\/\/yield" } } */
new file mode 100644
@@ -0,0 +1,14 @@
+/* Test the yield ACLE hint intrinsic */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-additional-options "-mthumb" } */
+
+#include "arm_acle.h"
+
+void
+test_yield (void)
+{
+ __yield ();
+}
+
+/* { dg-final {scan-assembler ".inst\t0xf3af8001\t\/\/yield" } } */