Show patches with: Submitter = Sudakshina Das       |    State = Action Required       |    Archived = No       |   18 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[ARM] Fix test fail with conflicting -mfloat-abi [ARM] Fix test fail with conflicting -mfloat-abi - - - - 0 0 0 2018-01-12 Sudakshina Das New
[PR81228,AARCH64,gcc-7] Backport r255625 : Fix ICE by adding LTGT [PR81228,AARCH64,gcc-7] Backport r255625 : Fix ICE by adding LTGT - - - - 0 0 0 2018-01-09 Sudakshina Das New
[PR82096] Fix ICE in int_mode_for_mode, at stor-layout.c:403 with arm-linux-gnueabi [PR82096] Fix ICE in int_mode_for_mode, at stor-layout.c:403 with arm-linux-gnueabi - - - - 0 0 0 2018-01-04 Sudakshina Das New
[PR81647,AARCH64] Fix handling of Unordered Comparisons in aarch64-simd.md [PR81647,AARCH64] Fix handling of Unordered Comparisons in aarch64-simd.md - - - - 0 0 0 2017-12-15 Sudakshina Das New
[ARM,gcc-7] Fix regression on soft float targets for armv8_2-fp16-move-2.c [ARM,gcc-7] Fix regression on soft float targets for armv8_2-fp16-move-2.c - - - - 0 0 0 2017-12-14 Sudakshina Das New
[ARM,gcc-7] Fix wrong code by arm_final_prescan with fp16 move instructions [ARM,gcc-7] Fix wrong code by arm_final_prescan with fp16 move instructions - - - - 0 0 0 2017-11-30 Sudakshina Das New
[ARM] Fix wrong code by arm_final_prescan with fp16 move instructions [ARM] Fix wrong code by arm_final_prescan with fp16 move instructions - - - - 0 0 0 2017-11-24 Sudakshina Das New
Add myself as GCC maintainer Add myself as GCC maintainer - - - - 0 0 0 2017-11-22 Sudakshina Das New
[ARM] Fix test armv8_2-fp16-move-1.c [ARM] Fix test armv8_2-fp16-move-1.c - - - - 0 0 0 2017-11-16 Sudakshina Das New
[ARM] Fix more -Wreturn-type fallout [ARM] Fix more -Wreturn-type fallout - - - - 0 0 0 2017-11-10 Sudakshina Das New
[AArch64] Fix ICE caused in aarch64_simd_valid_immediate [AArch64] Fix ICE caused in aarch64_simd_valid_immediate - - - - 0 0 0 2017-10-06 Sudakshina Das New
[AArch64] Add BIC-imm and ORR-imm SIMD pattern - - - - 0 0 0 2017-08-07 Sudakshina Das New
Simplification of 1U << (31 - x) - - - - 0 0 0 2017-08-01 Sudakshina Das New
[AArch64] Add BIC-imm and ORR-imm SIMD pattern - - - - 0 0 0 2017-04-18 Sudakshina Das New
Simplification of 1U << (31 - x) - - - - 0 0 0 2017-04-12 Sudakshina Das New
[AArch64] Fix missing optimization for CMP+AND - - - - 0 0 0 2017-03-29 Sudakshina Das New
[AArch64] Allow CMP+SHIFT when comparing with zero - - - - 0 0 0 2017-03-16 Sudakshina Das New
[ARM] Cleanup macro TARGET_EITHER - - - - 0 0 0 2017-03-16 Sudakshina Das New