Show patches with: Submitter = Srinath Parvathaneni       |    State = Action Required       |    Archived = No       |   88 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[GCC-10,backport,COMMITTED] arm: Fix the warning -mcpu=cortex-m55 conflicting with -march=armv8.1-m… [GCC-10,backport,COMMITTED] arm: Fix the warning -mcpu=cortex-m55 conflicting with -march=armv8.1-m… - - - - --- 2020-10-19 Srinath Parvathaneni New
arm: Fix the warning -mcpu=cortex-m55 conflicting with -march=armv8.1-m.main (pr97327). arm: Fix the warning -mcpu=cortex-m55 conflicting with -march=armv8.1-m.main (pr97327). - - - - --- 2020-10-16 Srinath Parvathaneni New
[GCC-10,backport] arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914) [GCC-10,backport] arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914) - - - - --- 2020-10-16 Srinath Parvathaneni New
[GCC-10,backport] arm: [MVE] Remove illegal intrinsics (PR target/96914) [GCC-10,backport] arm: [MVE] Remove illegal intrinsics (PR target/96914) - - - - --- 2020-10-16 Srinath Parvathaneni New
[GCC-10,backport] arm: [MVE] Add vqdmlashq intrinsics (PR target/96914) [GCC-10,backport] arm: [MVE] Add vqdmlashq intrinsics (PR target/96914) - - - - --- 2020-10-16 Srinath Parvathaneni New
[COMMITTED,GCC-10,backport] arm: Fix wrong code generated for mve scatter store with writeback intr… [COMMITTED,GCC-10,backport] arm: Fix wrong code generated for mve scatter store with writeback intr… - - - - --- 2020-10-16 Srinath Parvathaneni New
arm: Fix wrong code generated for mve scatter store with writeback intrinsics with -O2 (PR97271). arm: Fix wrong code generated for mve scatter store with writeback intrinsics with -O2 (PR97271). - - - - --- 2020-10-07 Srinath Parvathaneni New
[GCC-10,backport] arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55. [GCC-10,backport] arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55. - - - - --- 2020-10-06 Srinath Parvathaneni New
[GCC-10,backport] arm: Remove coercion from scalar argument to vmin & vmax intrinsics. [GCC-10,backport] arm: Remove coercion from scalar argument to vmin & vmax intrinsics. - - - - --- 2020-10-06 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix the failing mve scalar shift execution tests. [GCC-10,Backport] arm: Fix the failing mve scalar shift execution tests. - - - - --- 2020-06-22 Srinath Parvathaneni New
arm: Fix the failing mve scalar shift execution tests. arm: Fix the failing mve scalar shift execution tests. - - - - --- 2020-06-18 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix the MVE ACLE vaddq_m polymorphic variants. [GCC-10,Backport] arm: Fix the MVE ACLE vaddq_m polymorphic variants. - - - - --- 2020-06-17 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix MVE scalar shift intrinsics code-gen. [GCC-10,Backport] arm: Fix MVE scalar shift intrinsics code-gen. - - - - --- 2020-06-17 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix the MVE ACLE vbicq intrinsics. [GCC-10,Backport] arm: Fix the MVE ACLE vbicq intrinsics. - - - - --- 2020-06-16 Srinath Parvathaneni New
[GCC-10,Backport] arm: Correct the grouping of operands in MVE vector scatter store intrinsics (PR9… [GCC-10,Backport] arm: Correct the grouping of operands in MVE vector scatter store intrinsics (PR9… - - - - --- 2020-06-16 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix unintentional fall throughs in arm.c [GCC-10,Backport] arm: Fix unintentional fall throughs in arm.c - - - - --- 2020-06-16 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR9495… [GCC-10,Backport] arm: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR9495… - - - - --- 2020-06-16 Srinath Parvathaneni New
arm: Fix the MVE ACLE vaddq_m polymorphic variants. arm: Fix the MVE ACLE vaddq_m polymorphic variants. - - - - --- 2020-06-04 Srinath Parvathaneni New
[ARM] : Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735). [ARM] : Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735). - - - - --- 2020-06-02 Srinath Parvathaneni New
arm: Fix the MVE ACLE vbicq intrinsics. arm: Fix the MVE ACLE vbicq intrinsics. - - - - --- 2020-05-28 Srinath Parvathaneni New
[ARM] : Fix typo in documentation. [ARM] : Fix typo in documentation. - - - - --- 2020-05-18 Srinath Parvathaneni New
[ARM,wwwdocs] : Document Armv8.1-M Mainline Security Extensions changes. [ARM,wwwdocs] : Document Armv8.1-M Mainline Security Extensions changes. - - - - --- 2020-05-15 Srinath Parvathaneni New
[ARM,wwwdocs] : Document Armv8.1-M, Helium Intrinsics and Cortex-M55 changes. [ARM,wwwdocs] : Document Armv8.1-M, Helium Intrinsics and Cortex-M55 changes. - - - - --- 2020-05-15 Srinath Parvathaneni New
[ARM] : Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959). [ARM] : Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959). - - - - --- 2020-05-13 Srinath Parvathaneni New
[ARM] : Change arm constraint name from "e" to "Te". [ARM] : Change arm constraint name from "e" to "Te". - - - - --- 2020-04-24 Srinath Parvathaneni New
[ARM] : Fix for MVE ACLE intrinsics with writeback (PR94317). [ARM] : Fix for MVE ACLE intrinsics with writeback (PR94317). - - - - --- 2020-03-31 Srinath Parvathaneni New
[ARM] : Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support. [ARM] : Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support. - - - - --- 2020-03-31 Srinath Parvathaneni New
[v2,ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. [v2,ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. - - - - --- 2020-03-23 Srinath Parvathaneni New
[v2,ARM,13x] : MVE ACLE scalar shift intrinsics. [v2,ARM,13x] : MVE ACLE scalar shift intrinsics. - - - - --- 2020-03-23 Srinath Parvathaneni New
[v2,ARM,12x] : MVE ACLE intrinsics to set and get vector lane. [v2,ARM,12x] : MVE ACLE intrinsics to set and get vector lane. - - - - --- 2020-03-23 Srinath Parvathaneni New
[v2,ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also alias… [v2,ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also alias… - - - - --- 2020-03-20 Srinath Parvathaneni New
[v2,ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". [v2,ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". - - - - --- 2020-03-20 Srinath Parvathaneni New
[v2,ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. [v2,ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. - - - - --- 2020-03-20 Srinath Parvathaneni New
[v2,ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. [v2,ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. - - - - --- 2020-03-19 Srinath Parvathaneni New
[v2,ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. [v2,ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. - - - - --- 2020-03-19 Srinath Parvathaneni New
[v2,ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from me… [v2,ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from me… - - - - --- 2020-03-18 Srinath Parvathaneni New
[v2,ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. [v2,ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. - - - - --- 2020-03-18 Srinath Parvathaneni New
[v2,ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. [v2,ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. - - - - --- 2020-03-18 Srinath Parvathaneni New
[v2,ARM,3/5x] : MVE store intrinsics with predicated suffix. [v2,ARM,3/5x] : MVE store intrinsics with predicated suffix. - - - - --- 2020-03-18 Srinath Parvathaneni New
[v2,ARM,2/5x] : MVE load intrinsics. [v2,ARM,2/5x] : MVE load intrinsics. - - - - --- 2020-03-18 Srinath Parvathaneni New
[v2,ARM,1/5x] : MVE store intrinsics. [v2,ARM,1/5x] : MVE store intrinsics. - - - - --- 2020-03-18 Srinath Parvathaneni New
[v2,ARM,1/4x] : MVE intrinsics with quaternary operands. [v2,ARM,1/4x] : MVE intrinsics with quaternary operands. - - - - --- 2020-03-18 Srinath Parvathaneni New
[v4,ARM,3/x] : MVE ACLE intrinsics framework patch. [v4,ARM,3/x] : MVE ACLE intrinsics framework patch. - - - - --- 2020-03-16 Srinath Parvathaneni New
[v4,ARM,2/x] : MVE ACLE intrinsics framework patch. [v4,ARM,2/x] : MVE ACLE intrinsics framework patch. - - - - --- 2020-03-11 Srinath Parvathaneni New
[v2,ARM,3/2x] : MVE intrinsics with binary operands. [v2,ARM,3/2x] : MVE intrinsics with binary operands. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v2,ARM,2/2x] : MVE intrinsics with binary operands. [v2,ARM,2/2x] : MVE intrinsics with binary operands. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v2,ARM,1/2x] : MVE intrinsics with binary operands. [v2,ARM,1/2x] : MVE intrinsics with binary operands. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v2,ARM,4/1x] : MVE intrinsics with unary operand. [v2,ARM,4/1x] : MVE intrinsics with unary operand. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v2,ARM,2/1x] : MVE intrinsics with unary operand. [v2,ARM,2/1x] : MVE intrinsics with unary operand. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v2,ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. [v2,ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v2,ARM,4/x] : MVE ACLE vector interleaving store intrinsics. [v2,ARM,4/x] : MVE ACLE vector interleaving store intrinsics. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v3,ARM,3/x] : MVE ACLE intrinsics framework patch. [v3,ARM,3/x] : MVE ACLE intrinsics framework patch. - - - - --- 2020-03-10 Srinath Parvathaneni New
[v3,ARM,2/x] : MVE ACLE intrinsics framework patch. [v3,ARM,2/x] : MVE ACLE intrinsics framework patch. - - - - --- 2020-03-10 Srinath Parvathaneni New
: Add myself to MAINTAINERS : Add myself to MAINTAINERS - - - - --- 2020-03-05 Srinath Parvathaneni New
[v2,ARM,3/x] : MVE ACLE intrinsics framework patch. [v2,ARM,3/x] : MVE ACLE intrinsics framework patch. - - - - --- 2020-02-14 Srinath Parvathaneni New
[v2,ARM,2/x] : MVE ACLE intrinsics framework patch. [v2,ARM,2/x] : MVE ACLE intrinsics framework patch. - - - - --- 2020-02-14 Srinath Parvathaneni New
[ARM] : Fix the failing ACLE testcase with correct test directive. [ARM] : Fix the failing ACLE testcase with correct test directive. - - - - --- 2019-11-21 Srinath Parvathaneni New
[ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. [ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,13x] : MVE ACLE scalar shift intrinsics. [ARM,13x] : MVE ACLE scalar shift intrinsics. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,12x] : MVE ACLE intrinsics to set and get vector lane. [ARM,12x] : MVE ACLE intrinsics to set and get vector lane. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also aliases … [ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also aliases … - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". [ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. [ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. [ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. [ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,7/5x] : MVE store intrinsics which stores byte,half word or word to memory. [ARM,7/5x] : MVE store intrinsics which stores byte,half word or word to memory. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from memor… [ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from memor… - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. [ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. [ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,3/5x] : MVE store intrinsics with predicated suffix. [ARM,3/5x] : MVE store intrinsics with predicated suffix. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,2/5x] : MVE load intrinsics. [ARM,2/5x] : MVE load intrinsics. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,1/5x] : MVE store intrinsics. [ARM,1/5x] : MVE store intrinsics. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,1/4x] : MVE intrinsics with quaternary operands. [ARM,1/4x] : MVE intrinsics with quaternary operands. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,1/3x] : MVE intrinsics with ternary operands. [ARM,1/3x] : MVE intrinsics with ternary operands. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,3/2x] : MVE intrinsics with binary operands. [ARM,3/2x] : MVE intrinsics with binary operands. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,2/2x] : MVE intrinsics with binary operands. [ARM,2/2x] : MVE intrinsics with binary operands. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,1/2x] : MVE intrinsics with binary operands. [ARM,1/2x] : MVE intrinsics with binary operands. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,4/1x] : MVE intrinsics with unary operand. [ARM,4/1x] : MVE intrinsics with unary operand. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,2/1x] : MVE intrinsics with unary operand. [ARM,2/1x] : MVE intrinsics with unary operand. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. [ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,4/x] : MVE ACLE vector interleaving store intrinsics. [ARM,4/x] : MVE ACLE vector interleaving store intrinsics. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,3/x] : MVE ACLE intrinsics framework patch. [ARM,3/x] : MVE ACLE intrinsics framework patch. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,2/x] : MVE ACLE intrinsics framework patch. [ARM,2/x] : MVE ACLE intrinsics framework patch. - - - - --- 2019-11-14 Srinath Parvathaneni New
[ARM,1/x] : MVE ACLE intrinsics framework patch. [ARM,1/x] : MVE ACLE intrinsics framework patch. - - - - --- 2019-11-14 Srinath Parvathaneni New
[GCC-7,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-7) [GCC-7,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-7) - - - - --- 2019-04-29 Srinath Parvathaneni New
[GCC-8,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-8) [GCC-8,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-8) - - - - --- 2019-04-29 Srinath Parvathaneni New
[2/2,ARM] Implement hint intrinsics for ARM [1/2,AArch64] Implement hint intrinsics for AArch64 - - - - --- 2019-01-10 Srinath Parvathaneni New
[1/2,AArch64] Implement hint intrinsics for AArch64 [1/2,AArch64] Implement hint intrinsics for AArch64 - - - - --- 2019-01-10 Srinath Parvathaneni New