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[v2,4/9] aarch64: Add <su>cmp<GPI>_carryinC_m2

Message ID 20200321024231.13778-5-richard.henderson@linaro.org
State New
Headers show
Series aarch64: Implement TImode comparisons | expand

Commit Message

Jeff Law via Gcc-patches March 21, 2020, 2:42 a.m. UTC
Combine will fold immediate -1 differently than the other
*cmp*_carryinC* patterns.  In this case we can use adcs
with an xzr input, and it occurs frequently when comparing
128-bit values to small negative constants.

	* config/aarch64/aarch64.md (<su>cmp<GPI>_carryinC_m2): New.
---
 gcc/config/aarch64/aarch64.md | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 9b1c3f797f9..076158b0071 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3452,6 +3452,7 @@ 
    ""
 )
 
+;; Substituting zero into the first input operand.
 (define_insn "*usub<GPI:mode>3_carryinC_z1"
   [(set (reg:CC CC_REGNUM)
 	(compare:CC
@@ -3482,6 +3483,7 @@ 
   [(set_attr "type" "adc_reg")]
 )
 
+;; Substituting zero into the second input operand.
 (define_insn "*usub<GPI:mode>3_carryinC_z2"
   [(set (reg:CC CC_REGNUM)
 	(compare:CC
@@ -3508,6 +3510,19 @@ 
   [(set_attr "type" "adc_reg")]
 )
 
+;; Substituting -1 into the second input operand.
+(define_insn "*<ANY_EXTEND:su>cmp<GPI:mode>3_carryinC_m2"
+  [(set (reg:CC CC_REGNUM)
+	(compare:CC
+	  (neg:<DWI>
+	    (match_operand:<DWI> 1 "aarch64_carry_operation" ""))
+	  (ANY_EXTEND:<DWI>
+	    (match_operand:GPI 0 "register_operand" "r"))))]
+   ""
+   "adcs\\t<w>zr, %<w>0, <w>zr"
+  [(set_attr "type" "adc_reg")]
+)
+
 (define_insn "*usub<GPI:mode>3_carryinC"
   [(set (reg:CC CC_REGNUM)
 	(compare:CC