diff mbox series

[v2,1/9] aarch64: Accept 0 as first argument to compares

Message ID 20200321024231.13778-2-richard.henderson@linaro.org
State New
Headers show
Series aarch64: Implement TImode comparisons | expand

Commit Message

Jeff Law via Gcc-patches March 21, 2020, 2:42 a.m. UTC
While cmp (extended register) and cmp (immediate) uses <Wn|WSP>,
cmp (shifted register) uses <Wn>.  So we can perform cmp xzr, x0.

For ccmp, we only have <Wn> as an input.

	* config/aarch64/aarch64.md (cmp<GPI>): For operand 0, use
	aarch64_reg_or_zero.  Shuffle reg/reg to last alternative
	and accept Z.
	(@ccmpcc<GPI>): For operand 0, use aarch64_reg_or_zero and Z.
	(@ccmpcc<GPI>_rev): Likewise.
---
 gcc/config/aarch64/aarch64.md | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Richard Sandiford March 31, 2020, 4:55 p.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:
> While cmp (extended register) and cmp (immediate) uses <Wn|WSP>,
> cmp (shifted register) uses <Wn>.  So we can perform cmp xzr, x0.
>
> For ccmp, we only have <Wn> as an input.
>
> 	* config/aarch64/aarch64.md (cmp<GPI>): For operand 0, use
> 	aarch64_reg_or_zero.  Shuffle reg/reg to last alternative
> 	and accept Z.
> 	(@ccmpcc<GPI>): For operand 0, use aarch64_reg_or_zero and Z.
> 	(@ccmpcc<GPI>_rev): Likewise.

Looks good, but...

> ---
>  gcc/config/aarch64/aarch64.md | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index c7c4d1dd519..b9ae51e48dd 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -502,7 +502,7 @@
>  	   [(match_operand 0 "cc_register" "")
>  	    (const_int 0)])
>  	  (compare:CC_ONLY
> -	    (match_operand:GPI 2 "register_operand" "r,r,r")
> +	    (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
>  	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))
>  	  (unspec:CC_ONLY
>  	    [(match_operand 5 "immediate_operand")]
> @@ -542,7 +542,7 @@
>  	    [(match_operand 5 "immediate_operand")]
>  	    UNSPEC_NZCV)
>  	  (compare:CC_ONLY
> -	    (match_operand:GPI 2 "register_operand" "r,r,r")
> +	    (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
>  	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))))]
>    ""
>    "@
> @@ -3961,14 +3961,14 @@
>  
>  (define_insn "cmp<mode>"
>    [(set (reg:CC CC_REGNUM)
> -	(compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
> -		    (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
> +	(compare:CC (match_operand:GPI 0 "aarch64_reg_or_zero" "rk,rk,rkZ")
> +		    (match_operand:GPI 1 "aarch64_plus_operand" "I,J,rZ")))]
>    ""
>    "@
> -   cmp\\t%<w>0, %<w>1
>     cmp\\t%<w>0, %1
> -   cmn\\t%<w>0, #%n1"
> -  [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
> +   cmn\\t%<w>0, #%n1
> +   cmp\\t%<w>0, %<w>1"
> +  [(set_attr "type" "alus_imm,alus_imm,alus_sreg")]
>  )
>  
>  (define_insn "fcmp<mode>"

...does adding 'Z' to operand 1 enable any new combinations?
I guess it allows (compare:CC (const_int 0) (const_int 0)),
but it's borderline whether that should be valid rtl.

Richard
Jeff Law via Gcc-patches March 31, 2020, 5:15 p.m. UTC | #2
On 3/31/20 9:55 AM, Richard Sandiford wrote:
>>  (define_insn "cmp<mode>"
>>    [(set (reg:CC CC_REGNUM)
>> -	(compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
>> -		    (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
>> +	(compare:CC (match_operand:GPI 0 "aarch64_reg_or_zero" "rk,rk,rkZ")
>> +		    (match_operand:GPI 1 "aarch64_plus_operand" "I,J,rZ")))]
>>    ""
>>    "@
>> -   cmp\\t%<w>0, %<w>1
>>     cmp\\t%<w>0, %1
>> -   cmn\\t%<w>0, #%n1"
>> -  [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
>> +   cmn\\t%<w>0, #%n1
>> +   cmp\\t%<w>0, %<w>1"
>> +  [(set_attr "type" "alus_imm,alus_imm,alus_sreg")]
>>  )
>>  
>>  (define_insn "fcmp<mode>"
> 
> ...does adding 'Z' to operand 1 enable any new combinations?

Not useful ones, on reflection, but given it's a valid combination, it's easier
to include it than not.

I can certainly remove that.

r~
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c7c4d1dd519..b9ae51e48dd 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -502,7 +502,7 @@ 
 	   [(match_operand 0 "cc_register" "")
 	    (const_int 0)])
 	  (compare:CC_ONLY
-	    (match_operand:GPI 2 "register_operand" "r,r,r")
+	    (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
 	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))
 	  (unspec:CC_ONLY
 	    [(match_operand 5 "immediate_operand")]
@@ -542,7 +542,7 @@ 
 	    [(match_operand 5 "immediate_operand")]
 	    UNSPEC_NZCV)
 	  (compare:CC_ONLY
-	    (match_operand:GPI 2 "register_operand" "r,r,r")
+	    (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
 	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))))]
   ""
   "@
@@ -3961,14 +3961,14 @@ 
 
 (define_insn "cmp<mode>"
   [(set (reg:CC CC_REGNUM)
-	(compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
-		    (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
+	(compare:CC (match_operand:GPI 0 "aarch64_reg_or_zero" "rk,rk,rkZ")
+		    (match_operand:GPI 1 "aarch64_plus_operand" "I,J,rZ")))]
   ""
   "@
-   cmp\\t%<w>0, %<w>1
    cmp\\t%<w>0, %1
-   cmn\\t%<w>0, #%n1"
-  [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+   cmn\\t%<w>0, #%n1
+   cmp\\t%<w>0, %<w>1"
+  [(set_attr "type" "alus_imm,alus_imm,alus_sreg")]
 )
 
 (define_insn "fcmp<mode>"