@@ -32,21 +32,24 @@ EXPORTED_CONST int processor_flags_table[] =
/* z900 */ PF_IEEE_FLOAT | PF_ZARCH,
/* z990 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT,
/* z9-109 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
- | PF_EXTIMM,
+ | PF_EXTIMM,
/* z9-ec */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
- | PF_EXTIMM | PF_DFP,
+ | PF_EXTIMM | PF_DFP,
/* z10 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
- | PF_EXTIMM | PF_DFP | PF_Z10,
+ | PF_EXTIMM | PF_DFP | PF_Z10,
/* z196 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
- | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196,
+ | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196,
/* zEC12 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
- | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX,
+ | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX,
/* z13 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
- | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
- | PF_Z13 | PF_VX,
+ | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
+ | PF_Z13 | PF_VX,
/* z14 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
- | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
- | PF_Z13 | PF_VX | PF_VXE | PF_Z14
+ | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
+ | PF_Z13 | PF_VX | PF_VXE | PF_Z14,
+ /* arch13 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
+ | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
+ | PF_Z13 | PF_VX | PF_VXE | PF_Z14 | PF_VXE2 | PF_ARCH13
};
/* Change optimizations to be performed, depending on the
@@ -4727,7 +4727,7 @@ case "${target}" in
for which in arch tune; do
eval "val=\$with_$which"
case ${val} in
- "" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12)
+ "" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12 | arch13 )
# OK
;;
*)
@@ -120,7 +120,7 @@ s390_host_detect_local_cpu (int argc, const char **argv)
cpu = "z14";
break;
default:
- cpu = "z14";
+ cpu = "arch13";
break;
}
}
@@ -37,6 +37,7 @@ enum processor_type
PROCESSOR_2827_ZEC12,
PROCESSOR_2964_Z13,
PROCESSOR_3906_Z14,
+ PROCESSOR_ARCH13,
PROCESSOR_NATIVE,
PROCESSOR_max
};
@@ -337,6 +337,7 @@ const struct s390_processor processor_table[] =
{ "zEC12", "zEC12", PROCESSOR_2827_ZEC12, &zEC12_cost, 10 },
{ "z13", "z13", PROCESSOR_2964_Z13, &zEC12_cost, 11 },
{ "z14", "arch12", PROCESSOR_3906_Z14, &zEC12_cost, 12 },
+ { "arch13", "", PROCESSOR_ARCH13, &zEC12_cost, 13 },
{ "native", "", PROCESSOR_NATIVE, NULL, 0 }
};
@@ -14313,6 +14314,7 @@ s390_get_sched_attrmask (rtx_insn *insn)
mask |= S390_SCHED_ATTR_MASK_GROUPOFTWO;
break;
case PROCESSOR_3906_Z14:
+ case PROCESSOR_ARCH13:
if (get_attr_z14_cracked (insn))
mask |= S390_SCHED_ATTR_MASK_CRACKED;
if (get_attr_z14_expanded (insn))
@@ -14349,6 +14351,7 @@ s390_get_unit_mask (rtx_insn *insn, int *units)
mask |= 1 << 3;
break;
case PROCESSOR_3906_Z14:
+ case PROCESSOR_ARCH13:
*units = 4;
if (get_attr_z14_unit_lsu (insn))
mask |= 1 << 0;
@@ -39,7 +39,9 @@ enum processor_flags
PF_Z13 = 512,
PF_VX = 1024,
PF_Z14 = 2048,
- PF_VXE = 4096
+ PF_VXE = 4096,
+ PF_VXE2 = 8192,
+ PF_ARCH13 = 16384
};
/* This is necessary to avoid a warning about comparing different enum
@@ -98,6 +100,14 @@ enum processor_flags
(s390_arch_flags & PF_VXE)
#define TARGET_CPU_VXE_P(opts) \
(opts->x_s390_arch_flags & PF_VXE)
+#define TARGET_CPU_ARCH13 \
+ (s390_arch_flags & PF_ARCH13)
+#define TARGET_CPU_ARCH13_P(opts) \
+ (opts->x_s390_arch_flags & PF_ARCH13)
+#define TARGET_CPU_VXE2 \
+ (s390_arch_flags & PF_VXE2)
+#define TARGET_CPU_VXE2_P(opts) \
+ (opts->x_s390_arch_flags & PF_VXE2)
#define TARGET_HARD_FLOAT_P(opts) (!TARGET_SOFT_FLOAT_P(opts))
@@ -150,6 +160,13 @@ enum processor_flags
(TARGET_VX && TARGET_CPU_VXE)
#define TARGET_VXE_P(opts) \
(TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts))
+#define TARGET_ARCH13 (TARGET_ZARCH && TARGET_CPU_ARCH13)
+#define TARGET_ARCH13_P(opts) \
+ (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ARCH13_P (opts))
+#define TARGET_VXE2 \
+ (TARGET_VX && TARGET_CPU_VXE2)
+#define TARGET_VXE2_P(opts) \
+ (TARGET_VX_P (opts) && TARGET_CPU_VXE2_P (opts))
#ifdef HAVE_AS_MACHINE_MACHINEMODE
#define S390_USE_TARGET_ATTRIBUTE 1
@@ -510,7 +510,7 @@
(const (symbol_ref "s390_tune_attr")))
(define_attr "cpu_facility"
- "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe"
+ "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,arch13,vxe2"
(const_string "standard"))
(define_attr "enabled" ""
@@ -567,6 +567,14 @@
(and (eq_attr "cpu_facility" "vxe")
(match_test "TARGET_VXE"))
(const_int 1)
+
+ (and (eq_attr "cpu_facility" "arch13")
+ (match_test "TARGET_ARCH13"))
+ (const_int 1)
+
+ (and (eq_attr "cpu_facility" "vxe2")
+ (match_test "TARGET_VXE2"))
+ (const_int 1)
]
(const_int 0)))
@@ -110,6 +110,9 @@ EnumValue
Enum(processor_type) String(arch12) Value(PROCESSOR_3906_Z14)
EnumValue
+Enum(processor_type) String(arch13) Value(PROCESSOR_ARCH13)
+
+EnumValue
Enum(processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
mbackchain
@@ -215,6 +215,9 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/target-attribute/*.{c,S}]] \
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/arch12/*.{c,S}]] \
"" "-O3 -march=arch12 -mzarch"
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/arch13/*.{c,S}]] \
+ "" "-O3 -march=arch13 -mzarch"
+
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vxe/*.{c,S}]] \
"" "-O3 -march=arch12 -mzarch"
@@ -8961,6 +8961,22 @@ proc check_effective_target_s390_vxe { } {
} "-march=z14 -mzarch" ]
}
+# Same as above but for the arch13 vector enhancement facility. Test
+# is performed with the vector shift left double by bit instruction.
+proc check_effective_target_s390_vxe2 { } {
+ if ![istarget s390*-*-*] then {
+ return 0;
+ }
+
+ return [check_runtime s390_check_vxe2 {
+ int main (void)
+ {
+ asm ("vsld %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
+ return 0;
+ }
+ } "-march=arch13 -mzarch" ]
+}
+
#For versions of ARM architectures that have hardware div insn,
#disable the divmod transform