Show patches with: Archived = No       |   126820 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
config.sub, config.guess : Import upstream 2021-01-25. config.sub, config.guess : Import upstream 2021-01-25. - - - - --- 2021-02-23 Kito Cheng New
PR target/99314: Fix integer signedness issue for cpymem pattern expansion. PR target/99314: Fix integer signedness issue for cpymem pattern expansion. - - - - --- 2021-03-05 Kito Cheng New
[committed] PR target/99702: Check RTL type before get value [committed] PR target/99702: Check RTL type before get value - - - - --- 2021-03-22 Kito Cheng New
[wwwdoc] gcc-11/changes: Document RISC-V changes [wwwdoc] gcc-11/changes: Document RISC-V changes - - - - --- 2021-03-24 Kito Cheng New
[committed] testuite: Check pthread for omp module testing [committed] testuite: Check pthread for omp module testing - - - - --- 2021-05-19 Kito Cheng New
[committed] RISC-V: Pass -mno-relax to assembler [committed] RISC-V: Pass -mno-relax to assembler - - - - --- 2021-05-25 Kito Cheng New
[committed] testuite: Add pthread check to dg-module-cmi for omp module testing [committed] testuite: Add pthread check to dg-module-cmi for omp module testing - - - - --- 2021-06-22 Kito Cheng New
docs: Add 'S' to Machine Constraints for RISC-V docs: Add 'S' to Machine Constraints for RISC-V - - - - --- 2021-07-02 Kito Cheng New
[v2] docs: Add 'S' to Machine Constraints for RISC-V [v2] docs: Add 'S' to Machine Constraints for RISC-V - - 1 - --- 2021-07-12 Kito Cheng New
[committed] RISC-V: Detect python and pick best one for calling multilib-generator [committed] RISC-V: Detect python and pick best one for calling multilib-generator - - - - --- 2021-07-20 Kito Cheng New
RISC-V: Allow multi-lib build with different code model RISC-V: Allow multi-lib build with different code model - - - - --- 2021-07-21 Kito Cheng New
[1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-07-21 Kito Cheng New
[2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-07-21 Kito Cheng New
[v3,1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-09-16 Kito Cheng New
[v3,2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-09-16 Kito Cheng New
[RFC,1/8] RISC-V: Minimal support of bitmanip extension RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,2/8] RISC-V: Implement instruction patterns for ZBA extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,3/8] RISC-V: Cost model for zba extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,4/8] RISC-V: Implement instruction patterns for ZBB extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,5/8] RISC-V: Cost model for zbb extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,6/8] RISC-V: Use li and rori to load constants. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,7/8] RISC-V: Implement instruction patterns for ZBS extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,8/8] RISC-V: Cost model for ZBS extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[PR/target,100316] Allow constant address for __builtin___clear_cache. [PR/target,100316] Allow constant address for __builtin___clear_cache. - - - - --- 2021-10-07 Kito Cheng New
[v2,PR/target,100316] Allow constant address for __builtin___clear_cache. [v2,PR/target,100316] Allow constant address for __builtin___clear_cache. - - - - --- 2021-10-07 Kito Cheng New
[v3,PR/target,100316] Allow constant address for __builtin___clear_cache. [v3,PR/target,100316] Allow constant address for __builtin___clear_cache. - - - - --- 2021-10-08 Kito Cheng New
[committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script [committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script - - - - --- 2021-10-28 Kito Cheng New
[committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern [committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern - - - - --- 2021-10-28 Kito Cheng New
[committed,PR/target,102957] Allow Z*-ext extension with only 2 char. [committed,PR/target,102957] Allow Z*-ext extension with only 2 char. - - - - --- 2021-11-09 Kito Cheng New
[committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string [committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string - - - - --- 2021-11-11 Kito Cheng New
[1/2] RISC-V: Allow extension name contain digit RISC-V: Vector extensions support - - - - --- 2021-12-03 Kito Cheng New
[2/2] RISC-V: Minimal support of vector extensions RISC-V: Vector extensions support - - - - --- 2021-12-03 Kito Cheng New
RISC-V: Handle different sigcontext struct layout. RISC-V: Handle different sigcontext struct layout. - - - - --- 2022-01-18 Kito Cheng New
[committed] RISC-V: Fix testcase after bump isa spec version [committed] RISC-V: Fix testcase after bump isa spec version - - - - --- 2022-01-24 Kito Cheng New
[committed] RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 [committed] RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 - - - - --- 2022-01-24 Kito Cheng New
RISC-V: Always pass -misa-spec to assembler [PR104219] RISC-V: Always pass -misa-spec to assembler [PR104219] - - - - --- 2022-01-25 Kito Cheng New
[committed] RISC-V: Fix detection of zifencei support for binutils [committed] RISC-V: Fix detection of zifencei support for binutils - - - - --- 2022-02-05 Kito Cheng New
[committed] RISC-V: Implement misc macro for vector extensions. [committed] RISC-V: Implement misc macro for vector extensions. - - - - --- 2022-03-21 Kito Cheng New
[committed] RISC-V: Sync arch-canonicalize and riscv-common.cc [committed] RISC-V: Sync arch-canonicalize and riscv-common.cc - - - - --- 2022-04-11 Kito Cheng New
[committed] RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR104853] [committed] RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR104853] - - - - --- 2022-04-11 Kito Cheng New
[committed,wwwdocs] gcc-12/changes.html: Document RISC-V changes [committed,wwwdocs] gcc-12/changes.html: Document RISC-V changes - - - - --- 2022-04-28 Kito Cheng New
testsuite/102690: Only check warning for lp64 in Warray-bounds-16.C testsuite/102690: Only check warning for lp64 in Warray-bounds-16.C - - - - --- 2022-06-28 Kito Cheng New
[1/2] RISC-V: Support _Float16 type. RISC-V: Support IEEE half precision operation - - - - --- 2022-07-07 Kito Cheng New
[2/2] RISC-V: Support zfh and zfhmin extension RISC-V: Support IEEE half precision operation - - - - --- 2022-07-07 Kito Cheng New
soft-fp: Update soft-fp from glibc soft-fp: Update soft-fp from glibc - - - - --- 2022-08-10 Kito Cheng New
[v2,1/2] RISC-V: Support _Float16 type. [v2,1/2] RISC-V: Support _Float16 type. - - - - --- 2022-08-10 Kito Cheng New
[v2,2/2] RISC-V: Support zfh and zfhmin extension [v2,1/2] RISC-V: Support _Float16 type. - - - - --- 2022-08-10 Kito Cheng New
[committed] RISC-V: Suppress -Wclass-memaccess warning [committed] RISC-V: Suppress -Wclass-memaccess warning - - - - --- 2022-08-29 Kito Cheng New
[committed] RISC-V: Suppress build warnings [committed] RISC-V: Suppress build warnings - - - - --- 2022-09-09 Kito Cheng New
RISC-V: Support --target-help for -mcpu/-mtune RISC-V: Support --target-help for -mcpu/-mtune - - - - --- 2022-09-30 Kito Cheng New
PR middle-end/88345: Honor -falign-functions=N even optimized for size. PR middle-end/88345: Honor -falign-functions=N even optimized for size. - - 1 - --- 2022-10-07 Kito Cheng New
[committed] RISC-V: Add newline to the end of file [NFC] [committed] RISC-V: Add newline to the end of file [NFC] - - - - --- 2022-10-10 Kito Cheng New
[committed] RISC-V: Adjust testcase for rvv/base/user-1.c [committed] RISC-V: Adjust testcase for rvv/base/user-1.c - - 2 2 --- 2022-10-10 Kito Cheng New
[committed] RISC-V: Add riscv_vector.h wrapper in testsuite to prevent pull in stdint.h from C libr… [committed] RISC-V: Add riscv_vector.h wrapper in testsuite to prevent pull in stdint.h from C libr… - - 2 2 --- 2022-10-10 Kito Cheng New
RISC-V: Add h extension support RISC-V: Add h extension support - - - - --- 2022-10-24 Kito Cheng New
RISC-V: Fix RVV related testsuite RISC-V: Fix RVV related testsuite - - - - --- 2022-11-06 Kito Cheng New
RISC-V: Return const ref. for vl_vtype_info::get_avl_info RISC-V: Return const ref. for vl_vtype_info::get_avl_info - - - - --- 2022-12-27 Kito Cheng New
[committed] RISC-V: Add riscv_vector.h wrapper [committed] RISC-V: Add riscv_vector.h wrapper - - - - --- 2022-12-27 Kito Cheng New
[committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes [committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes - - - - --- 2023-01-26 Kito Cheng New
[committed] RISC-V: Simplify testcase condition for RVV tests [NFC] [committed] RISC-V: Simplify testcase condition for RVV tests [NFC] - - - - --- 2023-01-31 Kito Cheng New
RISC-V: Handle vlenb correctly in unwinding RISC-V: Handle vlenb correctly in unwinding - - - - --- 2023-02-12 Kito Cheng New
[committed] RISC-V: prefetch.* only take base register with zero-offset for the address [committed] RISC-V: prefetch.* only take base register with zero-offset for the address - - - - --- 2023-02-20 Kito Cheng New
[committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c [committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c - - - - --- 2023-02-22 Kito Cheng New
RISC-V: Define __riscv_v_intrinsic [PR109312] RISC-V: Define __riscv_v_intrinsic [PR109312] - - - - --- 2023-03-28 Kito Cheng New
[committed] RISC-V: Fix missing file dependency in RISC-V back-end [PR109328] [committed] RISC-V: Fix missing file dependency in RISC-V back-end [PR109328] - - - - --- 2023-03-31 Kito Cheng New
[committed] RISC-V: Fix testsuite fail on RV32 [committed] RISC-V: Fix testsuite fail on RV32 - - - - --- 2023-04-17 Kito Cheng New
Docs: Add doc for RISC-V vector intrinsics Docs: Add doc for RISC-V vector intrinsics - - - - --- 2023-04-18 Kito Cheng New
[wwwdocs] gcc-13: Add release note for RISC-V [wwwdocs] gcc-13: Add release note for RISC-V - - - - --- 2023-04-19 Kito Cheng New
[committed,v2] gcc-13: Add release note for RISC-V [committed,v2] gcc-13: Add release note for RISC-V - - - - --- 2023-04-20 Kito Cheng New
[committed] RISC-V: Fix simplify_ior_optimization.c on rv32 [committed] RISC-V: Fix simplify_ior_optimization.c on rv32 - - - - --- 2023-04-20 Kito Cheng New
[committed] RISC-V: Fix riscv/arch-19.c with different ISA spec version [committed] RISC-V: Fix riscv/arch-19.c with different ISA spec version - - - - --- 2023-04-20 Kito Cheng New
[committed,v2] RISC-V: Handle multi-lib path correclty for linux [DRAFT] [committed,v2] RISC-V: Handle multi-lib path correclty for linux [DRAFT] - - - - --- 2023-04-21 Kito Cheng New
[committed,v2] RISC-V: Add local user vsetvl instruction elimination [PR109547] [committed,v2] RISC-V: Add local user vsetvl instruction elimination [PR109547] - - - - --- 2023-04-21 Kito Cheng New
Docs: Add vector register constarint for asm operands Docs: Add vector register constarint for asm operands - - - - --- 2023-04-27 Kito Cheng New
[v2] Docs: Add vector register constarint for asm operands [v2] Docs: Add vector register constarint for asm operands - - - - --- 2023-04-27 Kito Cheng New
RISC-V: Handle multi-lib path correclty for linux RISC-V: Handle multi-lib path correclty for linux - - - - --- 2023-05-04 Kito Cheng New
[v2] RISC-V: Handle multi-lib path correclty for linux [v2] RISC-V: Handle multi-lib path correclty for linux - - - - --- 2023-05-04 Kito Cheng New
[committed] RISC-V: Factor out vector manager code in vsetvli insertion pass. [NFC] [committed] RISC-V: Factor out vector manager code in vsetvli insertion pass. [NFC] - - - - --- 2023-05-08 Kito Cheng New
[committed] RISC-V: Improve portability of testcases [committed] RISC-V: Improve portability of testcases - - - - --- 2023-05-08 Kito Cheng New
[committed,v2] RISC-V: Support const series vector for RVV auto-vectorization [committed,v2] RISC-V: Support const series vector for RVV auto-vectorization - - - - --- 2023-05-11 Kito Cheng New
[committed] RISC-V: Suppress unused parameter warning in riscv-common.cc [committed] RISC-V: Suppress unused parameter warning in riscv-common.cc - - - - --- 2023-05-12 Kito Cheng New
[committed,v4] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743] [committed,v4] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743] - - - - --- 2023-05-12 Kito Cheng New
RISC-V: Improve vector_insn_info::dump for LMUL and policy RISC-V: Improve vector_insn_info::dump for LMUL and policy - - - - --- 2023-05-12 Kito Cheng New
[committed] RISC-V: Pull out function call with side effect from gcc_assert. [committed] RISC-V: Pull out function call with side effect from gcc_assert. - - - - --- 2023-05-13 Kito Cheng New
[committed] RISC-V: Fix wrong select_kind in riscv_compute_multilib [committed] RISC-V: Fix wrong select_kind in riscv_compute_multilib - - - - --- 2023-05-16 Kito Cheng New
RISC-V: Add missing torture-init and torture-finish for rvv.exp RISC-V: Add missing torture-init and torture-finish for rvv.exp - - - - --- 2023-05-22 Kito Cheng New
RISC-V: Basic VLS code gen for RISC-V RISC-V: Basic VLS code gen for RISC-V - - - - --- 2023-05-30 Kito Cheng New
RISC-V: Handle rouding mode correctly on zfinx RISC-V: Handle rouding mode correctly on zfinx - - - - --- 2023-07-05 Kito Cheng New
doc: Add doc for RISC-V Operand Modifiers doc: Add doc for RISC-V Operand Modifiers - - - - --- 2023-07-10 Kito Cheng New
RISC-V: Return machine_mode rather than opt_machine_mode for get_mask_mode, NFC RISC-V: Return machine_mode rather than opt_machine_mode for get_mask_mode, NFC - - - - --- 2023-07-31 Kito Cheng New
RISC-V: Emit .note.GNU-stack for non-linux target as well RISC-V: Emit .note.GNU-stack for non-linux target as well - - - - --- 2023-08-31 Kito Cheng New
options: Prevent multidimensional arrays options: Prevent multidimensional arrays - - - - --- 2023-10-02 Kito Cheng New
RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512. RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512. - - - - --- 2023-10-03 Kito Cheng New
[v1,1/4] options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P macro for Mask and InverseMask [v1,1/4] options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P macro for Mask and InverseMask - - - - --- 2023-10-03 Kito Cheng New
[v1,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC] [v1,1/4] options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P macro for Mask and InverseMask - - - - --- 2023-10-03 Kito Cheng New
[v1,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support [v1,1/4] options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P macro for Mask and InverseMask - - - - --- 2023-10-03 Kito Cheng New
[v1,4/4] RISC-V: Implement target attribute [v1,1/4] options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P macro for Mask and InverseMask - - - - --- 2023-10-03 Kito Cheng New
[v2,1/4] options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P macro for Mask and InverseMask RISC-V target attribute - - - - --- 2023-10-10 Kito Cheng New
[v2,2/4] RISC-V: Refactor riscv_option_override and riscv_convert_vector_bits. [NFC] RISC-V target attribute - - - - --- 2023-10-10 Kito Cheng New
[v2,3/4] RISC-V: Extend riscv_subset_list, preparatory for target attribute support RISC-V target attribute - - - - --- 2023-10-10 Kito Cheng New
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