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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v3,1/5] or1k: Fix code quality for volatile memory loads
OpenRISC updates for 10 (fpu, fixes)
- - - -
-
-
-
2019-07-09
Stafford Horne
New
[v3,1/5] fortran: Tiny sort_actual internal refactoring
fortran: Ignore unused arguments for scalarisation [PR97896]
- - - -
-
-
-
2021-11-07
Mikael Morin
New
[v3,1/5] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578]
LoongArch: SIMD fixes and optimizations
- - - -
-
-
-
2023-11-20
Xi Ruoyao
New
[v3,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions.
Add support for approximate instructions and optimize divf/sqrtf/rsqrtf operations.
- - - -
-
-
-
2023-12-06
Jiahao Xu
New
[v3,1/5] Improve must tail in RTL backend
[v3,1/5] Improve must tail in RTL backend
- - - -
-
-
-
2024-01-31
Andi Kleen
New
[v3,1/4] ree: Default ree pass for O2 and above for rs6000 target.
[v3,1/4] ree: Default ree pass for O2 and above for rs6000 target.
- - - -
-
-
-
2023-04-19
Ajit Agarwal
New
[v3,1/4] libcc1: Introduce GCC_FE_VERSION_1
- - - -
-
-
-
2015-05-24
Jan Kratochvil
New
[v3,1/4] libatomic/test: Fix compilation for build sysroot
Fix library testsuite compilation for build sysroot
- - - -
-
-
-
2020-02-28
Maciej W. Rozycki
Superseded
[v3,1/4] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets
ifcvt: Allow if conversion of arithmetic in basic blocks with multiple sets
- - - -
-
-
-
2023-08-30
Manolis Tsamis
New
[v3,1/4] diagnostics: libcpp: Add LC_GEN linemaps to support in-memory buffers
diagnostics: libcpp: Overhaul locations for _Pragma tokens
- - - -
-
-
-
2023-07-21
Lewis Hyatt
New
[v3,1/4] c++: Implement __add_pointer built-in trait
[v3,1/4] c++: Implement __add_pointer built-in trait
- - - -
-
-
-
2024-02-15
Ken Matsui
New
[v3,1/4] arm: Auto-vectorization for MVE: veor
[v3,1/4] arm: Auto-vectorization for MVE: veor
- - - -
-
-
-
2020-12-11
Christophe Lyon
New
[v3,1/4] LoongArch: improved target configuration interface
LoongArch: target configuration interface update
- - - -
-
-
-
2023-08-31
Yang Yujie
New
[v3,1/4,SPARC] Errata workaround for GRLIB-TN-0012
[v3,1/4,SPARC] Errata workaround for GRLIB-TN-0012
- - - -
-
-
-
2017-11-28
Daniel Cederman
New
[v3,1/3] rtl: directly handle MEM in gen_highpart [PR102125]
lower more cases of memcpy [PR102125]
- - - -
-
-
-
2021-09-10
Richard Earnshaw
New
[v3,1/3] reassoc: Do not bias loop-carried PHIs early
reassoc: Propagate PHI_LOOP_BIAS along single uses
- - - -
-
-
-
2021-09-26
Ilya Leoshkevich
New
[v3,1/3] or1k: libgcc: initial support for openrisc
OpenRISC port
- - - -
-
-
-
2018-10-27
Stafford Horne
New
[v3,1/3] libgomp, nvptx: low-latency memory allocator
libgomp: OpenMP low-latency omp_alloc
- - - -
-
-
-
2023-12-03
Andrew Stubbs
New
[v3,1/3] libcpp: reject codepoints above 0x10FFFF
RFC: P1689R5 support
- - - -
-
-
-
2022-11-09
Ben Boeckel
New
[v3,1/3] libatomic: atomic_16.S: Improve ENTRY, END and ALIAS macro interface
Libatomic: Add LSE128 atomics support for AArch64
- - - -
-
-
-
2024-01-03
Victor Do Nascimento
New
[v3,1/3] c++: sort candidates according to viability
[v3,1/3] c++: sort candidates according to viability
- - - -
-
-
-
2023-10-27
Patrick Palka
New
[v3,1/3] c++: Track lifetimes in constant evaluation [PR70331,PR96630,PR98675]
c++: Track lifetimes in constant evaluation [PR70331,...]
- - - -
-
-
-
2023-07-01
Nathaniel Shead
New
[v3,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait
[v3,1/3] c++, libstdc++: Implement __is_arithmetic built-in trait
- - - -
-
-
-
2023-07-18
Ken Matsui
New
[v3,1/3] RISC-V: Minimal support of z[f/d]inx extension.
RISC-V: Support z[f/d]inx extension
- - - -
-
-
-
2022-05-23
Jiawei
New
[v3,1/3] RISC-V: Add support for XCVelw extension in CV32E40P
RISC-V: Support CORE-V XCVELW and XCVBI extensions
- - - -
-
-
-
2023-11-28
Mary Bennett
New
[v3,1/3] RISC-V: Add stub support for existing extensions (privileged)
RISC-V: Add stub support for existing extensions
- - - -
-
-
-
2023-08-29
Tsukasa OI
New
[v3,1/3] PR preprocessor/83173: Additional check before decrementing highest_location
PR preprocessor/83173: C preprocessor generates incorrect linemarkers
- - - -
-
-
-
2018-11-01
Mike Gulick
New
[v3,1/3] LoongArch: Adjust D version strings.
LoongArch D support
- - - -
-
-
-
2023-12-01
Yang Yujie
New
[v3,1/2] xtensa: Eliminate unused stack frame allocation/freeing
[v3,1/2] xtensa: Eliminate unused stack frame allocation/freeing
- - - -
-
-
-
2022-09-07
Takayuki 'January June' Suwa
New
[v3,1/2] x86: Convert CONST_WIDE_INT/CONST_VECTOR to broadcast
x86: Convert CONST_WIDE_INT/CONST_VECTOR to broadcast
- - - -
-
-
-
2021-06-08
H.J. Lu
New
[v3,1/2] x86: Add no_callee_saved_registers function attribute
x86: Don't save callee-saved registers if not needed
- - - -
-
-
-
2024-01-23
H.J. Lu
New
[v3,1/2] testsuite: Declare fortran array bound variables
fortran: Fix specification checks [PR111781]
- - - -
-
-
-
2024-03-19
Mikael Morin
New
[v3,1/2] rs6000: Move g++.dg powerpc PR tests to g++.target
rs6000: Move g++.dg powerpc tests to g++.target
- - - -
-
-
-
2022-04-18
Paul A. Clarke
New
[v3,1/2] rs6000: Add support for _mm_minpos_epu16
rs6000: Add support for _mm_minpos_epu16
- - - -
-
-
-
2021-07-15
Paul A. Clarke
New
[v3,1/2] op_by_pieces_d::run: Change a while loop to a do-while loop
Generate offset adjusted operation for op_by_pieces operations
- - - -
-
-
-
2021-04-27
H.J. Lu
New
[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters
[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters
- - - -
-
-
-
2023-11-06
Tamar Christina
New
[v3,1/2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT
[v3,1/2] libstdc++: Define _GLIBCXX_HAS_BUILTIN_TRAIT
- - - -
-
-
-
2023-07-28
Ken Matsui
New
[v3,1/2] libruntime: Add fiber context switch code for LoongArch.
LoongArch D support
- - - -
-
-
-
2023-12-08
Yang Yujie
New
[v3,1/2] generate EH info for volatile asm statements (PR93981)
generate EH info for asm statements (PR93981)
- - - -
-
-
-
2020-03-12
Li, Pan2 via Gcc-patches
New
[v3,1/2] extend.texi: Arrange pre-existing built-in traits alphabetically
[v3,1/2] extend.texi: Arrange pre-existing built-in traits alphabetically
- - - -
-
-
-
2024-03-15
Ken Matsui
New
[v3,1/2] c++: implement __is_volatile built-in trait
[v3,1/2] c++: implement __is_volatile built-in trait
- - - -
-
-
-
2023-07-08
Ken Matsui
New
[v3,1/2] c++: implement __is_unsigned built-in trait
[v3,1/2] c++: implement __is_unsigned built-in trait
- - - -
-
-
-
2023-07-08
Ken Matsui
New
[v3,1/2] c++: implement __is_const built-in trait
[v3,1/2] c++: implement __is_const built-in trait
- - - -
-
-
-
2023-07-08
Ken Matsui
New
[v3,1/2] c++: implement __is_array built-in trait
[v3,1/2] c++: implement __is_array built-in trait
- - - -
-
-
-
2023-07-08
Ken Matsui
New
[v3,1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]
[v3,1/2] c++: Initial support for P0847R7 (Deducing This) [PR102609]
- - - -
-
-
-
2023-09-26
waffl3x
New
[v3,1/2] c++, libstdc++: Implement __is_pointer built-in trait
[v3,1/2] c++, libstdc++: Implement __is_pointer built-in trait
- - - -
-
-
-
2023-07-13
Ken Matsui
New
[v3,1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns
arm: Add support for MVE Tail-Predicated Low Overhead Loops
- - - -
-
-
-
2024-01-19
Andre Vieira (lists)
New
[v3,1/2] aarch64: fix warning emission for ABI break since GCC 9.1
[v3,1/2] aarch64: fix warning emission for ABI break since GCC 9.1
- - - -
-
-
-
2023-01-11
Christophe Lyon
New
[v3,1/2] Temporary remove "at least 8 byte alignment" code from x86
- - - -
-
-
-
2016-08-30
Denys Vlasenko
New
[v3,1/2] RISC-V: Add support for XCVsimd extension in CV32E40P
RISC-V: Support CORE-V XCVSIMD extension
- - - -
-
-
-
2024-01-16
Mary Bennett
New
[v3,1/2] RISC-V: Add support for XCVmac extension in CV32E40P
RISC-V: Support CORE-V XCVMAC and XCVALU extensions
- - - -
-
-
-
2023-09-30
Mary Bennett
New
[v3,1/2] PR c/65403 - Ignore -Wno-error=<some-future-warning>
[v3,1/2] PR c/65403 - Ignore -Wno-error=<some-future-warning>
- - - -
-
-
-
2019-06-27
Alex Henrie
New
[v3,1/2] MIPS: unaligned load: use SImode for SUBREG if OK (PR98996)
[v3,1/2] MIPS: unaligned load: use SImode for SUBREG if OK (PR98996)
- - - -
-
-
-
2021-02-23
YunQiang Su
New
[v3,1/2] MIPS: Not trigger error for pre-R6 and -mcompact-branches=always
[v3,1/2] MIPS: Not trigger error for pre-R6 and -mcompact-branches=always
- - - -
-
-
-
2021-02-20
YunQiang Su
New
[v3,1/2] LoongArch: Enable vect.exp for LoongArch. [PR111424]
LoongArch: Update target-supports.exp for LoongArch SX/ASX.
- - - -
-
-
-
2023-09-28
Chenghui Pan
New
[v3,1/2] LoongArch: Define ISA versions
[v3,1/2] LoongArch: Define ISA versions
- - - -
-
-
-
2024-04-22
Yang Yujie
New
[v3,1/2] LoongArch: Add the macro implementation of mcmodel=extreme.
When cmodel=extreme, add macro support and only support macros.
- - - -
-
-
-
2024-01-05
Lulu Cheng
New
[v3,1/2] IFN: Implement IFN_VEC_SET for ARRAY_REF with VIEW_CONVERT_EXPR
[v3,1/2] IFN: Implement IFN_VEC_SET for ARRAY_REF with VIEW_CONVERT_EXPR
- - - -
-
-
-
2020-09-22
Xionghu Luo
New
[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]
Handle component_ref to a structure/union field including FAM for builtin_object_size
- - - -
-
-
-
2023-02-11
Qing Zhao
New
[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]
[v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832]
- - - -
-
-
-
2023-02-23
Qing Zhao
New
[v3,1/2] Fix __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__
- - - -
-
-
-
2014-08-26
Jessica Clarke
New
[v3,1/2] Add a pass to automatically add ptwrite instrumentation
[v3,1/2] Add a pass to automatically add ptwrite instrumentation
- - - -
-
-
-
2018-11-25
Andi Kleen
New
[v3,1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result.
New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V
- - - -
-
-
-
2021-09-16
Kito Cheng
New
[v3,1/2] Add -f[no-]direct-extern-access
Implement indirect external access
- - - -
-
-
-
2021-07-09
H.J. Lu
New
[v3,1/2,PR,debug/67192] Fix C loops' back-jump location
- - - -
-
-
-
2015-11-04
Andreas Arnez
New
[v3,1/2,PR,debug/67192] Fix C loops' back-jump location
- - - -
-
-
-
2015-11-05
Andreas Arnez
New
[v3,1/1] gcc: config: microblaze: fix cpu version check
[v3,1/1] gcc: config: microblaze: fix cpu version check
- - - -
-
-
-
2023-10-25
Neal Frager
New
[v3,1/1] RISC-V: Add support for XCVmem extension in CV32E40P
RISC-V: Support CORE-V XCVMEM extension
- - - -
-
-
-
2024-01-25
Mary Bennett
New
[v3,1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P
RISC-V: Support CORE-V XCVBITMAIP extension
- - - -
-
-
-
2024-01-22
Mary Bennett
New
[v3,1/1] RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond' support
RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond' support
- - - -
-
-
-
2023-09-05
Tsukasa OI
New
[v3,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.
[v3,1/19] modula2 front end: changes outside gcc/m2, libgm2 and gcc/testsuite.
- - - -
-
-
-
2022-12-06
Gaius Mulley
New
[v3,1/1,ARM] Add support for TLS register based stack protector canary access
implement TLS register based stack canary for ARM
- - - 1
-
-
-
2021-10-26
Ard Biesheuvel
New
[v3,1/1,AARCH64,PR102768] aarch64: Add compiler support for Shadow Call Stack
[v3,1/1,AARCH64,PR102768] aarch64: Add compiler support for Shadow Call Stack
- - - -
-
-
-
2022-01-29
Dan Li
New
[v3,09/18] convert the Java front end to automatic dependencies
- - - -
-
-
-
2013-08-20
Tom Tromey
New
[v3,09/15] arm: Fix vcond_mask expander for MVE (PR target/100757)
ARM/MVE use vectors of boolean for predicates
- - - -
-
-
-
2022-01-13
Christophe Lyon
New
[v3,09/12] x86: Also pass -mno-avx to cold-attribute-1.c
[v3,01/12] Add TARGET_READ_MEMSET_VALUE/TARGET_GEN_MEMSET_VALUE
- - - -
-
-
-
2021-05-17
H.J. Lu
New
[v3,09/12] arm: vst1q_types_x4 ACLE intrinsics
arm: vld1q vst1 vst1q vst1 intrinsics
- - - -
-
-
-
2024-01-02
Ezra Sitorus
New
[v3,09/12] Rename "x86 Windows Options" to "Cygwin and MinGW Options"
Add aarch64-w64-mingw32 target
- - - -
-
-
-
2024-04-11
Evgeny Karpov
New
[v3,09/12] LoongArch Port: libgomp
Add LoongArch support.
- - - -
-
-
-
2021-12-10
Chenghua Xu
New
[v3,09/11] riscv: thead: Add support for the XTheadMemPair ISA extension
RISC-V: Add XThead* extension support
- - - -
-
-
-
2023-02-24
Christoph Müllner
New
[v3,09/11] c: Turn -Wreturn-mismatch into a permerror
: More warnings as errors by default
- - - -
-
-
-
2023-11-20
Florian Weimer
New
[v3,09/11] aarch64: Rewrite non-writeback ldp/stp patterns
Untitled series #385687
- - - -
-
-
-
2023-12-07
Alex Coplan
New
[v3,09/11] FYI/unfinished: OpenMP: lvalue parsing for map clauses (C++)
OpenMP 5.0: Struct & mapping clause expansion rework
- - - -
-
-
-
2022-09-13
Julian Brown
New
[v3,09/10] testsuite: Mark that PRU uses all function pointer bits
New backend for the TI PRU processor
- - - -
-
-
-
2018-08-16
Dimitar Dimitrov
New
[v3,09/10] libgcc: Add support for HF mode (aka _Float16) in libbid
Untitled series #300427
- - - -
-
-
-
2022-05-16
Christophe Lyon
New
[v3,09/10] RISCV: Weaken atomic loads
RISCV: Implement ISA Manual Table A.6 Mappings
- - - -
-
-
-
2023-04-10
Patrick O'Neill
New
[v3,09/10] Ignore LLVM's blank lines.
AMD GCN Port v3
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2018-12-12
Andrew Stubbs
New
[v3,08/18] convert the ObjC++ front end to automatic dependencies
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2013-08-20
Tom Tromey
New
[v3,08/15] arm: Implement auto-vectorized MVE comparisons with vectors of boolean predicates
ARM/MVE use vectors of boolean for predicates
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2022-01-13
Christophe Lyon
New
[v3,08/12] x86: Also pass -mno-avx to pr72839.c
[v3,01/12] Add TARGET_READ_MEMSET_VALUE/TARGET_GEN_MEMSET_VALUE
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2021-05-17
H.J. Lu
New
[v3,08/12] arm: vst1q_types_x3 ACLE intrinsics
arm: vld1q vst1 vst1q vst1 intrinsics
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2024-01-02
Ezra Sitorus
New
[v3,08/12] aarch64: Add SEH to machine_function
Add aarch64-w64-mingw32 target
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2024-04-11
Evgeny Karpov
New
[v3,08/12] LoongArch Port: Regenerate libgcc/configure.
Add LoongArch support.
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2021-12-10
Chenghua Xu
New
[v3,08/11] riscv: thead: Add support for the XTheadFmv ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,08/11] c: Do not ignore some forms of -Wimplicit-int in system headers
: More warnings as errors by default
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2023-11-20
Florian Weimer
New
[v3,08/11] aarch64: Generalize writeback ldp/stp patterns
Untitled series #385687
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2023-12-07
Alex Coplan
New
[v3,08/11] OpenMP/OpenACC: Rework clause expansion and nested struct handling
OpenMP 5.0: Struct & mapping clause expansion rework
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2022-09-13
Julian Brown
New
[v3,08/10] testsuite: Mark that PRU has one-cycle jumps
New backend for the TI PRU processor
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2018-08-16
Dimitar Dimitrov
New
[v3,08/10] Testsuite: GCN is always PIE.
AMD GCN Port v3
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2018-12-12
Andrew Stubbs
New
[v3,08/10] RISCV: Weaken mem_thread_fence
RISCV: Implement ISA Manual Table A.6 Mappings
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2023-04-10
Patrick O'Neill
New
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