| Message ID | c796ca5adc21c55f92968070e7f13201fe5b3f4a.1701768028.git.ysato@users.sourceforge.jp |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Device Tree support for SH7751 based board | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dt-meta-schema | fail | build log |
Hi Sato-san, On Tue, Dec 5, 2023 at 10:46 AM Yoshinori Sato <ysato@users.sourceforge.jp> wrote: > Renesas SH series and compatible ISA CPUs. > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/sh/cpus.yaml > @@ -0,0 +1,73 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sh/cpus.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas SuperH CPUs > + > +maintainers: > + - Yoshinori Sato <ysato@users.sourceforge.jp> > + > +description: |+ > + The device tree allows to describe the layout of CPUs in a system through > + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") > + defining properties for every cpu. > + > + Bindings for CPU nodes follow the Devicetree Specification, available from: > + > + https://www.devicetree.org/specifications/ > + > +properties: > + compatible: > + items: > + - enum: > + - renesas,sh2a > + - renesas,sh3 > + - renesas,sh4 > + - renesas,sh4a > + - jcore,j2 > + - const: renesas,sh2 Plain "renesas,sh2" should be accepted, too. > + > + clock-frequency: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + CPU core clock freqency. frequency Although clocks below is more flexible. > + > + clocks: true maxItems: 1 > + > + clock-names: true > + > + reg: > + $ref: /schemas/types.yaml#/definitions/uint32 > + const: 0 Some SH systems are SMP, so non-zero values should be accepted. > + > + device_type: true > + > +required: > + - compatible > + - reg > + - device_type > + > +additionalProperties: true > + > +examples: > + - | > + #include <dt-bindings/clock/sh7750.h> fatal error: dt-bindings/clock/sh7750.h: No such file or directory sh7750-cpg.h > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu: cpu@0 { > + compatible = "renesas,sh4", "renesas,sh2"; > + device_type = "cpu"; > + reg = <0>; > + clocks = <&cpg SH7750_CPG_ICK>; > + clock-names = "ick"; > + icache-size = <16384>; > + icache-line-size = <32>; > + dcache-size = <32768>; > + dcache-line-size = <32>; > + }; > + }; > +... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/Documentation/devicetree/bindings/sh/cpus.yaml b/Documentation/devicetree/bindings/sh/cpus.yaml new file mode 100644 index 000000000000..eb57e76e2aa2 --- /dev/null +++ b/Documentation/devicetree/bindings/sh/cpus.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sh/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SuperH CPUs + +maintainers: + - Yoshinori Sato <ysato@users.sourceforge.jp> + +description: |+ + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every cpu. + + Bindings for CPU nodes follow the Devicetree Specification, available from: + + https://www.devicetree.org/specifications/ + +properties: + compatible: + items: + - enum: + - renesas,sh2a + - renesas,sh3 + - renesas,sh4 + - renesas,sh4a + - jcore,j2 + - const: renesas,sh2 + + clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CPU core clock freqency. + + clocks: true + + clock-names: true + + reg: + $ref: /schemas/types.yaml#/definitions/uint32 + const: 0 + + device_type: true + +required: + - compatible + - reg + - device_type + +additionalProperties: true + +examples: + - | + #include <dt-bindings/clock/sh7750.h> + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu: cpu@0 { + compatible = "renesas,sh4", "renesas,sh2"; + device_type = "cpu"; + reg = <0>; + clocks = <&cpg SH7750_CPG_ICK>; + clock-names = "ick"; + icache-size = <16384>; + icache-line-size = <32>; + dcache-size = <32768>; + dcache-line-size = <32>; + }; + }; +...
Renesas SH series and compatible ISA CPUs. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> --- .../devicetree/bindings/sh/cpus.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml