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[v2,0/3] Update RISC-V Instruction Sets

Message ID 20230816092439.570839-1-jamie.gibbons@microchip.com
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Series Update RISC-V Instruction Sets | expand

Message

Jamie Gibbons Aug. 16, 2023, 9:24 a.m. UTC 
Hi all,

As per an earlier discussion with Thomas Petazzoni, we have decided that
it best to update the RISC-V instruction sets. This patch series updates
the kconfig to allow C and V to be selected as part of the general
purpose instruction set, thus allowing IMAFD + C and IMAFD + V to be a
part of a general purpose selection and keeping configurations as
custom.
With this I have updated the microchip_mpfs_icicle_defconfig to make use
of these changes.
Finally, I have included a fix to the post-image script to allow an
sdcard.img to be built for the Microchip MPFS Icicle kit. When merging,
some changes were made that broke this. The hss-payload-generator tool
looks for the u-boot.bin image in the directory this command is run
from. This binary file is located in the output images directory. All
changes to this script were made to try to ensure optimise paths and
methods while achieving a working solution.
This patch set is indended to be applied to the next branch as that is
where the Microchip Icicle kit patch series has previously been applied.

Looking forward to your feedback.

Regards,
Jamie.

v1 -> v2 changes:
- copied RVC and RVV kconfigs to both riscv_g and riscv_custom

Jamie Gibbons (3):
  arch/Config.in.riscv: update instruction set ext
  configs/microchip_mpfs_icicle_defconfig: update instruction sets
  board/microchip/mpfs_icicle: update post-image script

 arch/Config.in.riscv                      | 15 +++++++++++++++
 board/microchip/mpfs_icicle/post-image.sh |  6 ++++--
 configs/microchip_mpfs_icicle_defconfig   |  5 +----
 3 files changed, 20 insertions(+), 6 deletions(-)