| Message ID | 20181019220743.15020-9-lukas.auer@aisec.fraunhofer.de |
|---|---|
| State | Superseded |
| Delegated to: | Andes |
| Headers | show |
| Series | General fixes / cleanup for RISC-V and improvements to qemu-riscv | expand |
Hi Lukas, On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer <lukas.auer@aisec.fraunhofer.de> wrote: > > RISC-V has two code models, medium low (medlow) and medium any (medany). > Medlow limits addressable memory to a single 2 GiB range between the > absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory > to any single 2 GiB address range. > By default, medlow is selected on 32-bit systems and medany on 64-bit > systems. This matches the configuration in Linux. > > The -mcmodel compiler flag is selected according to the Kconfig > configuration. > > Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> > --- > > arch/riscv/Kconfig | 19 +++++++++++++++++++ > arch/riscv/Makefile | 7 +++++-- > 2 files changed, 24 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index e15329c35e..ce07fb4b55 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -38,6 +38,25 @@ config ARCH_RV64I > > endchoice > > +choice > + prompt "Code Model" > + default CMODEL_MEDLOW if 32BIT > + default CMODEL_MEDANY if 64BIT > + > +config CMODEL_MEDLOW > + bool "medium low code model" > + help > + U-Boot and its statically defined symbols must lie within a single 2 GiB > + address range and must lie between absolute addresses -2 GiB and +2 GiB. > + > +config CMODEL_MEDANY > + bool "medium any code model" > + help > + U-Boot and its statically defined symbols must be within any single 2 GiB > + address range. > + > +endchoice > + > config RISCV_ISA_C > bool "Emit compressed instructions" > default y > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile > index 6fb292d0b4..da6e50bd14 100644 > --- a/arch/riscv/Makefile > +++ b/arch/riscv/Makefile > @@ -13,8 +13,11 @@ riscv-mabi-$(CONFIG_ARCH_RV32I) := ilp32 > > arch-y := -march=$(riscv-march-y) -mabi=$(riscv-mabi-y) > > -PLATFORM_CPPFLAGS += $(arch-y) > -CFLAGS_EFI += $(arch-y) > +cmodel-$(CONFIG_CMODEL_MEDLOW) := -mcmodel=medlow > +cmodel-$(CONFIG_CMODEL_MEDANY) := -mcmodel=medany > + > +PLATFORM_CPPFLAGS += $(arch-y) $(cmodel-y) > +CFLAGS_EFI += $(arch-y) $(cmodel-y) > > head-y := arch/riscv/cpu/start.o See my comments for patch [07/30]. We can do similar thing to the code model. Regards, Bin
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index e15329c35e..ce07fb4b55 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -38,6 +38,25 @@ config ARCH_RV64I endchoice +choice + prompt "Code Model" + default CMODEL_MEDLOW if 32BIT + default CMODEL_MEDANY if 64BIT + +config CMODEL_MEDLOW + bool "medium low code model" + help + U-Boot and its statically defined symbols must lie within a single 2 GiB + address range and must lie between absolute addresses -2 GiB and +2 GiB. + +config CMODEL_MEDANY + bool "medium any code model" + help + U-Boot and its statically defined symbols must be within any single 2 GiB + address range. + +endchoice + config RISCV_ISA_C bool "Emit compressed instructions" default y diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 6fb292d0b4..da6e50bd14 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -13,8 +13,11 @@ riscv-mabi-$(CONFIG_ARCH_RV32I) := ilp32 arch-y := -march=$(riscv-march-y) -mabi=$(riscv-mabi-y) -PLATFORM_CPPFLAGS += $(arch-y) -CFLAGS_EFI += $(arch-y) +cmodel-$(CONFIG_CMODEL_MEDLOW) := -mcmodel=medlow +cmodel-$(CONFIG_CMODEL_MEDANY) := -mcmodel=medany + +PLATFORM_CPPFLAGS += $(arch-y) $(cmodel-y) +CFLAGS_EFI += $(arch-y) $(cmodel-y) head-y := arch/riscv/cpu/start.o
RISC-V has two code models, medium low (medlow) and medium any (medany). Medlow limits addressable memory to a single 2 GiB range between the absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory to any single 2 GiB address range. By default, medlow is selected on 32-bit systems and medany on 64-bit systems. This matches the configuration in Linux. The -mcmodel compiler flag is selected according to the Kconfig configuration. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> --- arch/riscv/Kconfig | 19 +++++++++++++++++++ arch/riscv/Makefile | 7 +++++-- 2 files changed, 24 insertions(+), 2 deletions(-)