diff mbox

[U-Boot,2/2] MIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hex

Message ID 20160609120952.4799-2-paul.burton@imgtec.com
State Accepted
Delegated to: Daniel Schwierzeck
Headers show

Commit Message

Paul Burton June 9, 2016, 12:09 p.m. UTC 
For consistency with the other cache-related Kconfig entries & the
values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int
entry instead of a hex entry.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 372286217f05 ("MIPS: Split I & D cache line size config")
---

 arch/mips/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Daniel Schwierzeck June 10, 2016, 10:46 a.m. UTC | #1 
Am 09.06.2016 um 14:09 schrieb Paul Burton:
> For consistency with the other cache-related Kconfig entries & the
> values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int
> entry instead of a hex entry.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Fixes: 372286217f05 ("MIPS: Split I & D cache line size config")
> ---
> 
>  arch/mips/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

applied to u-boot-mips, thanks.

BTW: there is a similar patch from Purna [1] but I applied this one
because it contains a "Fixes:" line.

[1] http://patchwork.ozlabs.org/patch/630747/
diff mbox

Patch

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5c30ae9..21066f0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -253,7 +253,7 @@  config SYS_DCACHE_SIZE
 	  The total size of the L1 Dcache, if known at compile time.
 
 config SYS_DCACHE_LINE_SIZE
-	hex
+	int
 	default 0
 	help
 	  The size of L1 Dcache lines, if known at compile time.