[U-Boot,v2,25/27] x86: crownbay: Add SDHCI support

There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
support so that we can use them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- Use ARRAY_SIZE(mmc_supported) instead of 2
- Check return value of add_sdhci()

 arch/x86/cpu/queensbay/Makefile   |  2 +-
 arch/x86/cpu/queensbay/topcliff.c | 47 +++++++++++++++++++++++++++++++++++++++
 include/configs/crownbay.h        |  6 +++++
 3 files changed, 54 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/cpu/queensbay/topcliff.c

On 9 December 2014 at 07:50, Bin Meng <bmeng.cn@gmail.com> wrote:
> There are two standard SD card slots on the Crown Bay board, which
> are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
> support so that we can use them.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - Use ARRAY_SIZE(mmc_supported) instead of 2
> - Check return value of add_sdhci()
>
>  arch/x86/cpu/queensbay/Makefile   |  2 +-
>  arch/x86/cpu/queensbay/topcliff.c | 47 +++++++++++++++++++++++++++++++++++++++
>  include/configs/crownbay.h        |  6 +++++
>  3 files changed, 54 insertions(+), 1 deletion(-)
>  create mode 100644 arch/x86/cpu/queensbay/topcliff.c

Acked-by: Simon Glass <sjg@chromium.org>

>
> diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
> index ace04ca..2c2ec01 100644
> --- a/arch/x86/cpu/queensbay/Makefile
> +++ b/arch/x86/cpu/queensbay/Makefile
> @@ -4,6 +4,6 @@
>  # SPDX-License-Identifier:     GPL-2.0+
>  #
>
> -obj-y += tnc_car.o tnc_dram.o tnc.o
> +obj-y += tnc_car.o tnc_dram.o tnc.o topcliff.o
>  obj-y += fsp_configs.o fsp_support.o
>  obj-$(CONFIG_PCI) += tnc_pci.o
> diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c
> new file mode 100644
> index 0000000..b01422a
> --- /dev/null
> +++ b/arch/x86/cpu/queensbay/topcliff.c
> @@ -0,0 +1,47 @@
> +/*
> + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <errno.h>
> +#include <malloc.h>
> +#include <pci.h>
> +#include <pci_ids.h>
> +#include <sdhci.h>
> +
> +static struct pci_device_id mmc_supported[] = {
> +       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
> +       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
> +       { }
> +};
> +
> +int cpu_mmc_init(bd_t *bis)
> +{
> +       struct sdhci_host *mmc_host;
> +       pci_dev_t devbusfn;
> +       u32 iobase;
> +       int ret;
> +       int i;
> +
> +       for (i = 0; i < ARRAY_SIZE(mmc_supported); i++) {
> +               devbusfn =  pci_find_devices(mmc_supported, i);
> +               if (devbusfn == -1)
> +                       return -ENODEV;
> +
> +               mmc_host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
> +               if (!mmc_host)
> +                       return -ENOMEM;
> +
> +               mmc_host->name = "Topcliff SDHCI";
> +               pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
> +               mmc_host->ioaddr = (void *)iobase;
> +               mmc_host->quirks = 0;
> +               ret = add_sdhci(mmc_host, 0, 0);
> +               if (ret)
> +                       return ret;
> +       }
> +
> +       return 0;
> +}
> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
> index 09a52ab..b9db6b7 100644
> --- a/include/configs/crownbay.h
> +++ b/include/configs/crownbay.h
> @@ -48,6 +48,12 @@
>
>  #define CONFIG_SPI_FLASH_SST
>
> +#define CONFIG_MMC
> +#define CONFIG_SDHCI
> +#define CONFIG_GENERIC_MMC
> +#define CONFIG_MMC_SDMA
> +#define CONFIG_CMD_MMC
> +
>  /* Video is not supported */
>  #undef CONFIG_VIDEO
>  #undef CONFIG_CFB_CONSOLE
> --
> 1.8.2.1
>