diff mbox

[23/36] arm: save always 32 fpu registers

Message ID a8f59cb7e34316062409da762013740dd7fb9f2d.1332197811.git.quintela@redhat.com
State New
Headers show

Commit Message

Juan Quintela March 19, 2012, 10:57 p.m. UTC
This way, we fix a bug (we were overwritten the 16 first registers on
load), and we don't need to check for ARM_FEATUR_VPF3, we always send
the 32 registers.

Signed-off-by: Juan Quintela <quintela@redhat.com>
---
 target-arm/cpu.h     |    2 +-
 target-arm/machine.c |   22 ++--------------------
 2 files changed, 3 insertions(+), 21 deletions(-)

Comments

Peter Maydell March 20, 2012, 11:54 a.m. UTC | #1
On 19 March 2012 22:57, Juan Quintela <quintela@redhat.com> wrote:
> This way, we fix a bug (we were overwritten the 16 first registers on
> load), and we don't need to check for ARM_FEATUR_VPF3, we always send
> the 32 registers.

This commit message is out of date -- the overwriting bug was
fixed in commit 15180256 last year. Possibly the patch should
be dropped from your series? (If not, "ARM_FEATURE_VFP3".)

-- PMM
Juan Quintela March 20, 2012, 12:27 p.m. UTC | #2
Peter Maydell <peter.maydell@linaro.org> wrote:
> On 19 March 2012 22:57, Juan Quintela <quintela@redhat.com> wrote:
>> This way, we fix a bug (we were overwritten the 16 first registers on
>> load), and we don't need to check for ARM_FEATUR_VPF3, we always send
>> the 32 registers.
>
> This commit message is out of date -- the overwriting bug was
> fixed in commit 15180256 last year. Possibly the patch should
> be dropped from your series? (If not, "ARM_FEATURE_VFP3".)

Reason for the change is not to have to write partial arrays.
Current code is doing

if ARM_FEATURE_VFP
  send first 16 registers
  if (ARM_FEATURE_VFP3
    send second 16 registers

I change it to:

if ARM_FEATURE_VFP
   send 32 registers

Notice that:
a- there is always 32 registers
b- makes the migration format the same for VFP and VFP3
c- we are already incompatible with previous versions, so this is not a
problem.

Normally, the less different options that we have on the migration
format, the easy to make sense of it.  It was not related to the bug
that we used to have in this area.

Later, Juan.
Peter Maydell March 20, 2012, 1:48 p.m. UTC | #3
On 20 March 2012 12:27, Juan Quintela <quintela@redhat.com> wrote:
> Peter Maydell <peter.maydell@linaro.org> wrote:
>> This commit message is out of date -- the overwriting bug was
>> fixed in commit 15180256 last year. Possibly the patch should
>> be dropped from your series? (If not, "ARM_FEATURE_VFP3".)
>
> Reason for the change is not to have to write partial arrays.

> Normally, the less different options that we have on the migration
> format, the easy to make sense of it.  It was not related to the bug
> that we used to have in this area.

OK, so you just need to fix the commit message.

thanks
-- PMM
diff mbox

Patch

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 26c114b..a6e8c7e 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -455,7 +455,7 @@  void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
 #define cpu_signal_handler cpu_arm_signal_handler
 #define cpu_list arm_cpu_list

-#define CPU_SAVE_VERSION 6
+#define CPU_SAVE_VERSION 7

 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel
diff --git a/target-arm/machine.c b/target-arm/machine.c
index f66b8df..9c0f773 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -64,7 +64,7 @@  void cpu_save(QEMUFile *f, void *opaque)
     qemu_put_be32(f, env->features);

     if (arm_feature(env, ARM_FEATURE_VFP)) {
-        for (i = 0;  i < 16; i++) {
+        for (i = 0;  i < 32; i++) {
             CPU_DoubleU u;
             u.d = env->vfp.regs[i];
             qemu_put_be32(f, u.l.upper);
@@ -77,15 +77,6 @@  void cpu_save(QEMUFile *f, void *opaque)
         /* TODO: Should use proper FPSCR access functions.  */
         qemu_put_be32(f, env->vfp.vec_len);
         qemu_put_be32(f, env->vfp.vec_stride);
-
-        if (arm_feature(env, ARM_FEATURE_VFP3)) {
-            for (i = 16;  i < 32; i++) {
-                CPU_DoubleU u;
-                u.d = env->vfp.regs[i];
-                qemu_put_be32(f, u.l.upper);
-                qemu_put_be32(f, u.l.lower);
-            }
-        }
     }

     if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
@@ -182,7 +173,7 @@  int cpu_load(QEMUFile *f, void *opaque, int version_id)
     env->features = qemu_get_be32(f);

     if (arm_feature(env, ARM_FEATURE_VFP)) {
-        for (i = 0;  i < 16; i++) {
+        for (i = 0;  i < 32; i++) {
             CPU_DoubleU u;
             u.l.upper = qemu_get_be32(f);
             u.l.lower = qemu_get_be32(f);
@@ -195,15 +186,6 @@  int cpu_load(QEMUFile *f, void *opaque, int version_id)
         /* TODO: Should use proper FPSCR access functions.  */
         env->vfp.vec_len = qemu_get_be32(f);
         env->vfp.vec_stride = qemu_get_be32(f);
-
-        if (arm_feature(env, ARM_FEATURE_VFP3)) {
-            for (i = 16;  i < 32; i++) {
-                CPU_DoubleU u;
-                u.l.upper = qemu_get_be32(f);
-                u.l.lower = qemu_get_be32(f);
-                env->vfp.regs[i] = u.d;
-            }
-        }
     }

     if (arm_feature(env, ARM_FEATURE_IWMMXT)) {