From patchwork Mon Mar 19 22:57:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juan Quintela X-Patchwork-Id: 147709 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0D215B6EE6 for ; Tue, 20 Mar 2012 11:43:20 +1100 (EST) Received: from localhost ([::1]:37394 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S9lYi-0005ge-Ve for incoming@patchwork.ozlabs.org; Mon, 19 Mar 2012 19:00:12 -0400 Received: from eggs.gnu.org ([208.118.235.92]:55838) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S9lXI-00037u-6f for qemu-devel@nongnu.org; Mon, 19 Mar 2012 18:58:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S9lXA-00011g-4z for qemu-devel@nongnu.org; Mon, 19 Mar 2012 18:58:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:31966) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S9lX9-00011D-UC for qemu-devel@nongnu.org; Mon, 19 Mar 2012 18:58:36 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q2JMwYXs029682 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 19 Mar 2012 18:58:34 -0400 Received: from trasno.mitica (ovpn-116-17.ams2.redhat.com [10.36.116.17]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id q2JMw4od017718; Mon, 19 Mar 2012 18:58:33 -0400 From: Juan Quintela To: qemu-devel@nongnu.org Date: Mon, 19 Mar 2012 23:57:51 +0100 Message-Id: In-Reply-To: References: In-Reply-To: References: X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 23/36] arm: save always 32 fpu registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This way, we fix a bug (we were overwritten the 16 first registers on load), and we don't need to check for ARM_FEATUR_VPF3, we always send the 32 registers. Signed-off-by: Juan Quintela --- target-arm/cpu.h | 2 +- target-arm/machine.c | 22 ++-------------------- 2 files changed, 3 insertions(+), 21 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 26c114b..a6e8c7e 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -455,7 +455,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list -#define CPU_SAVE_VERSION 6 +#define CPU_SAVE_VERSION 7 /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel diff --git a/target-arm/machine.c b/target-arm/machine.c index f66b8df..9c0f773 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -64,7 +64,7 @@ void cpu_save(QEMUFile *f, void *opaque) qemu_put_be32(f, env->features); if (arm_feature(env, ARM_FEATURE_VFP)) { - for (i = 0; i < 16; i++) { + for (i = 0; i < 32; i++) { CPU_DoubleU u; u.d = env->vfp.regs[i]; qemu_put_be32(f, u.l.upper); @@ -77,15 +77,6 @@ void cpu_save(QEMUFile *f, void *opaque) /* TODO: Should use proper FPSCR access functions. */ qemu_put_be32(f, env->vfp.vec_len); qemu_put_be32(f, env->vfp.vec_stride); - - if (arm_feature(env, ARM_FEATURE_VFP3)) { - for (i = 16; i < 32; i++) { - CPU_DoubleU u; - u.d = env->vfp.regs[i]; - qemu_put_be32(f, u.l.upper); - qemu_put_be32(f, u.l.lower); - } - } } if (arm_feature(env, ARM_FEATURE_IWMMXT)) { @@ -182,7 +173,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) env->features = qemu_get_be32(f); if (arm_feature(env, ARM_FEATURE_VFP)) { - for (i = 0; i < 16; i++) { + for (i = 0; i < 32; i++) { CPU_DoubleU u; u.l.upper = qemu_get_be32(f); u.l.lower = qemu_get_be32(f); @@ -195,15 +186,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) /* TODO: Should use proper FPSCR access functions. */ env->vfp.vec_len = qemu_get_be32(f); env->vfp.vec_stride = qemu_get_be32(f); - - if (arm_feature(env, ARM_FEATURE_VFP3)) { - for (i = 16; i < 32; i++) { - CPU_DoubleU u; - u.l.upper = qemu_get_be32(f); - u.l.lower = qemu_get_be32(f); - env->vfp.regs[i] = u.d; - } - } } if (arm_feature(env, ARM_FEATURE_IWMMXT)) {