Message ID | 1416908568-5482-1-git-send-email-Mingkai.Hu@freescale.com |
---|---|
State | Superseded |
Delegated to: | York Sun |
Headers | show |
On 11/25/2014 01:42 AM, Mingkai Hu wrote: > From: Po Liu <Po.Liu@freescale.com> > > Add NOR and SPI flash secure boot target for C29XPCIE board. > > Signed-off-by: Po Liu <Po.Liu@freescale.com> > Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com> > --- > configs/C29XPCIE_NOR_SECBOOT_defconfig | 4 ++++ > configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++ > include/configs/C29XPCIE.h | 2 ++ > 3 files changed, 10 insertions(+) > create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig > create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig > > diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig > new file mode 100644 > index 0000000..86751cf > --- /dev/null > +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig > @@ -0,0 +1,4 @@ > +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" > +CONFIG_PPC=y > +CONFIG_MPC85xx=y > +CONFIG_TARGET_C29XPCIE=y > diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig > new file mode 100644 > index 0000000..d1a42b2 > --- /dev/null > +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig > @@ -0,0 +1,4 @@ > +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" > +CONFIG_PPC=y > +CONFIG_MPC85xx=y > +CONFIG_TARGET_C29XPCIE=y > diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h > index 5d11278..1d8dce8 100644 > --- a/include/configs/C29XPCIE.h > +++ b/include/configs/C29XPCIE.h > @@ -579,4 +579,6 @@ > > #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND > > +#include <asm/fsl_secure_boot.h> > + > #endif /* __CONFIG_H */ > Mingkai, I see you sent another patch by mistake. You should add a new version number to this one because their subject are the same. Please update MAINTAINERS file when you add new targets. York
> -----Original Message----- > From: York Sun [mailto:yorksun@freescale.com] > Sent: Wednesday, November 26, 2014 12:22 AM > To: Hu Mingkai-B21284; u-boot@lists.denx.de > Cc: Sun York-R58495; Liu Po-B43644 > Subject: Re: [PATCH] powerpc/c29xpcie: Add secure boot support > > On 11/25/2014 01:42 AM, Mingkai Hu wrote: > > From: Po Liu <Po.Liu@freescale.com> > > > > Add NOR and SPI flash secure boot target for C29XPCIE board. > > > > Signed-off-by: Po Liu <Po.Liu@freescale.com> > > Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com> > > --- > > configs/C29XPCIE_NOR_SECBOOT_defconfig | 4 ++++ > > configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++ > > include/configs/C29XPCIE.h | 2 ++ > > 3 files changed, 10 insertions(+) > > create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig > > create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig > > > > diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig > > b/configs/C29XPCIE_NOR_SECBOOT_defconfig > > new file mode 100644 > > index 0000000..86751cf > > --- /dev/null > > +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig > > @@ -0,0 +1,4 @@ > > +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" > > +CONFIG_PPC=y > > +CONFIG_MPC85xx=y > > +CONFIG_TARGET_C29XPCIE=y > > diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig > > b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig > > new file mode 100644 > > index 0000000..d1a42b2 > > --- /dev/null > > +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig > > @@ -0,0 +1,4 @@ > > +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" > > +CONFIG_PPC=y > > +CONFIG_MPC85xx=y > > +CONFIG_TARGET_C29XPCIE=y > > diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h > > index 5d11278..1d8dce8 100644 > > --- a/include/configs/C29XPCIE.h > > +++ b/include/configs/C29XPCIE.h > > @@ -579,4 +579,6 @@ > > > > #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND > > > > +#include <asm/fsl_secure_boot.h> > > + > > #endif /* __CONFIG_H */ > > > > Mingkai, > > I see you sent another patch by mistake. You should add a new version > number to this one because their subject are the same. > > Please update MAINTAINERS file when you add new targets. > > York Hi York, I will sent version 2 patch. I didn't find target maintain info in the MAINTAINERS file, it is about sub module maintain info. Do we need to update the MAINTAINERS file for target update? Thanks, Mingkai
On 11/25/2014 08:40 AM, Hu Mingkai-B21284 wrote: > > >> -----Original Message----- >> From: York Sun [mailto:yorksun@freescale.com] >> Sent: Wednesday, November 26, 2014 12:22 AM >> To: Hu Mingkai-B21284; u-boot@lists.denx.de >> Cc: Sun York-R58495; Liu Po-B43644 >> Subject: Re: [PATCH] powerpc/c29xpcie: Add secure boot support >> >> On 11/25/2014 01:42 AM, Mingkai Hu wrote: >>> From: Po Liu <Po.Liu@freescale.com> >>> >>> Add NOR and SPI flash secure boot target for C29XPCIE board. >>> >>> Signed-off-by: Po Liu <Po.Liu@freescale.com> >>> Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com> >>> --- >>> configs/C29XPCIE_NOR_SECBOOT_defconfig | 4 ++++ >>> configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++ >>> include/configs/C29XPCIE.h | 2 ++ >>> 3 files changed, 10 insertions(+) >>> create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig >>> create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig >>> >>> diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig >>> b/configs/C29XPCIE_NOR_SECBOOT_defconfig >>> new file mode 100644 >>> index 0000000..86751cf >>> --- /dev/null >>> +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig >>> @@ -0,0 +1,4 @@ >>> +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" >>> +CONFIG_PPC=y >>> +CONFIG_MPC85xx=y >>> +CONFIG_TARGET_C29XPCIE=y >>> diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig >>> b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig >>> new file mode 100644 >>> index 0000000..d1a42b2 >>> --- /dev/null >>> +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig >>> @@ -0,0 +1,4 @@ >>> +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" >>> +CONFIG_PPC=y >>> +CONFIG_MPC85xx=y >>> +CONFIG_TARGET_C29XPCIE=y >>> diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h >>> index 5d11278..1d8dce8 100644 >>> --- a/include/configs/C29XPCIE.h >>> +++ b/include/configs/C29XPCIE.h >>> @@ -579,4 +579,6 @@ >>> >>> #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND >>> >>> +#include <asm/fsl_secure_boot.h> >>> + >>> #endif /* __CONFIG_H */ >>> >> >> Mingkai, >> >> I see you sent another patch by mistake. You should add a new version >> number to this one because their subject are the same. >> >> Please update MAINTAINERS file when you add new targets. >> >> York > Hi York, > > I will sent version 2 patch. > I didn't find target maintain info in the MAINTAINERS file, it is about sub module maintain info. Do we need to update the MAINTAINERS file for target update? > All you need is to add the new defconfig in board/freescale/c29xpcie/MAINTAINERS. York
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig new file mode 100644 index 0000000..86751cf --- /dev/null +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_C29XPCIE=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig new file mode 100644 index 0000000..d1a42b2 --- /dev/null +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_C29XPCIE=y diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 5d11278..1d8dce8 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -579,4 +579,6 @@ #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND +#include <asm/fsl_secure_boot.h> + #endif /* __CONFIG_H */