diff mbox

[v2,2/3] powerpc/pseries: Update dynamic cache nodes for suspend/resume operation

Message ID 1390420717-23907-3-git-send-email-tyreld@linux.vnet.ibm.com (mailing list archive)
State Superseded
Headers show

Commit Message

Tyrel Datwyler Jan. 22, 2014, 7:58 p.m. UTC
From: Haren Myneni <hbabu@us.ibm.com>

From: Haren Myneni <hbabu@us.ibm.com>

pHyp can change cache nodes for suspend/resume operation. The current code
updates the device tree after all non boot CPUs are enabled. Hence, we do not
modify the cache list based on the latest cache nodes. Also we do not remove
cache entries for the primary CPU.

This patch removes the cache list for the boot CPU, updates the device tree
before enabling nonboot CPUs and adds cache list for the boot cpu.

Signed-off-by: Haren Myneni <hbabu@us.ibm.com>
Signed-off-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/rtas.h |  4 ++++
 arch/powerpc/kernel/rtas.c      | 17 +++++++++++++++++
 arch/powerpc/kernel/time.c      |  6 ++++++
 3 files changed, 27 insertions(+)

Comments

Nathan Fontenot Jan. 28, 2014, 7:41 p.m. UTC | #1
On 01/22/2014 01:58 PM, Tyrel Datwyler wrote:
> From: Haren Myneni <hbabu@us.ibm.com>
> 
> From: Haren Myneni <hbabu@us.ibm.com>
> 
> pHyp can change cache nodes for suspend/resume operation. The current code
> updates the device tree after all non boot CPUs are enabled. Hence, we do not
> modify the cache list based on the latest cache nodes. Also we do not remove
> cache entries for the primary CPU.
> 
> This patch removes the cache list for the boot CPU, updates the device tree
> before enabling nonboot CPUs and adds cache list for the boot cpu.
> 
> Signed-off-by: Haren Myneni <hbabu@us.ibm.com>
> Signed-off-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
> ---
>  arch/powerpc/include/asm/rtas.h |  4 ++++
>  arch/powerpc/kernel/rtas.c      | 17 +++++++++++++++++
>  arch/powerpc/kernel/time.c      |  6 ++++++
>  3 files changed, 27 insertions(+)
> 
> diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
> index 9bd52c6..da9d733 100644
> --- a/arch/powerpc/include/asm/rtas.h
> +++ b/arch/powerpc/include/asm/rtas.h
> @@ -283,6 +283,10 @@ extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal);
> 
>  #ifdef CONFIG_PPC_PSERIES
>  extern int pseries_devicetree_update(s32 scope);
> +extern void post_mobility_fixup(void);
> +extern void update_dynamic_configuration(void);
> +#else /* !CONFIG_PPC_PSERIES */
> +void update_dynamic_configuration(void) { }
>  #endif
> 
>  #ifdef CONFIG_PPC_RTAS_DAEMON
> diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
> index 4cf674d..8249eb2 100644
> --- a/arch/powerpc/kernel/rtas.c
> +++ b/arch/powerpc/kernel/rtas.c
> @@ -43,6 +43,7 @@
>  #include <asm/time.h>
>  #include <asm/mmu.h>
>  #include <asm/topology.h>
> +#include "cacheinfo.h"
> 
>  struct rtas_t rtas = {
>  	.lock = __ARCH_SPIN_LOCK_UNLOCKED
> @@ -972,6 +973,22 @@ out:
>  	free_cpumask_var(offline_mask);
>  	return atomic_read(&data.error);
>  }
> +
> +/*
> + * The device tree cache nodes can be modified during suspend/ resume.
> + * So delete all cache entries and recreate them again after the device tree
> + * update.
> + * We already deleted cache entries for notboot CPUs before suspend. So delete
> + * entries for the primary CPU, recreate entries after the device tree update.
> + * We can create entries for nonboot CPU when enable them later.
> + */
> +
> +void update_dynamic_configuration(void)
> +{
> +	cacheinfo_cpu_offline(smp_processor_id());
> +	post_mobility_fixup();
> +	cacheinfo_cpu_online(smp_processor_id());
> +}
>  #else /* CONFIG_PPC_PSERIES */
>  int rtas_ibm_suspend_me(struct rtas_args *args)
>  {
> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
> index b3b1441..5f1ca28 100644
> --- a/arch/powerpc/kernel/time.c
> +++ b/arch/powerpc/kernel/time.c
> @@ -69,6 +69,7 @@
>  #include <asm/vdso_datapage.h>
>  #include <asm/firmware.h>
>  #include <asm/cputime.h>
> +#include <asm/rtas.h>
> 
>  /* powerpc clocksource/clockevent code */
> 
> @@ -592,6 +593,11 @@ void arch_suspend_enable_irqs(void)
>  	generic_suspend_enable_irqs();
>  	if (ppc_md.suspend_enable_irqs)
>  		ppc_md.suspend_enable_irqs();
> +	/*
> +	 * Update configuration which can be modified based on devicetree
> +	 * changes during resume.
> +	 */
> +	update_dynamic_configuration();

Instead of creating this new routine update_dynamic_reconfiguration() for
pseries systems only, shouldn't we be defining ppc_md.suspend_enable_irqs
for pseries. I think this could be done in platforms/pseries/suspend.c

-Nathan

>  }
>  #endif
>
diff mbox

Patch

diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 9bd52c6..da9d733 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -283,6 +283,10 @@  extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal);
 
 #ifdef CONFIG_PPC_PSERIES
 extern int pseries_devicetree_update(s32 scope);
+extern void post_mobility_fixup(void);
+extern void update_dynamic_configuration(void);
+#else /* !CONFIG_PPC_PSERIES */
+void update_dynamic_configuration(void) { }
 #endif
 
 #ifdef CONFIG_PPC_RTAS_DAEMON
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 4cf674d..8249eb2 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -43,6 +43,7 @@ 
 #include <asm/time.h>
 #include <asm/mmu.h>
 #include <asm/topology.h>
+#include "cacheinfo.h"
 
 struct rtas_t rtas = {
 	.lock = __ARCH_SPIN_LOCK_UNLOCKED
@@ -972,6 +973,22 @@  out:
 	free_cpumask_var(offline_mask);
 	return atomic_read(&data.error);
 }
+
+/*
+ * The device tree cache nodes can be modified during suspend/ resume.
+ * So delete all cache entries and recreate them again after the device tree
+ * update.
+ * We already deleted cache entries for notboot CPUs before suspend. So delete
+ * entries for the primary CPU, recreate entries after the device tree update.
+ * We can create entries for nonboot CPU when enable them later.
+ */
+
+void update_dynamic_configuration(void)
+{
+	cacheinfo_cpu_offline(smp_processor_id());
+	post_mobility_fixup();
+	cacheinfo_cpu_online(smp_processor_id());
+}
 #else /* CONFIG_PPC_PSERIES */
 int rtas_ibm_suspend_me(struct rtas_args *args)
 {
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index b3b1441..5f1ca28 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -69,6 +69,7 @@ 
 #include <asm/vdso_datapage.h>
 #include <asm/firmware.h>
 #include <asm/cputime.h>
+#include <asm/rtas.h>
 
 /* powerpc clocksource/clockevent code */
 
@@ -592,6 +593,11 @@  void arch_suspend_enable_irqs(void)
 	generic_suspend_enable_irqs();
 	if (ppc_md.suspend_enable_irqs)
 		ppc_md.suspend_enable_irqs();
+	/*
+	 * Update configuration which can be modified based on devicetree
+	 * changes during resume.
+	 */
+	update_dynamic_configuration();
 }
 #endif